PIC12F683
When the OSCTUNE register is modified, the
HFINTOSC frequency will begin shifting to the new fre-
quency. The HFINTOSC clock will stabilize within 1 ms.
Code execution continues during this shift. There is no
indication that the shift has occurred.
3.4.2.1
OSCTUNE Register
The HFINTOSC is factory calibrated but can be
adjusted in software by writing to the OSCTUNE
register (Register 3-1).
The OSCTUNE register has a tuning range of ±12%.
The default value of the OSCTUNE register is ‘0’. The
value is a 5-bit two’s complement number. Due to pro-
cess variation, the monotonicity and frequency step
cannot be specified.
OSCTUNE does not affect the LFINTOSC frequency.
Operation of features that depend on the LFINTOSC
clock source frequency, such as the Power-up Timer
(PWRT), Watchdog Timer (WDT), Fail-Safe Clock
Monitor (FSCM) and peripherals, are not affected by
the change in frequency.
REGISTER 3-1:
OSCTUNE – OSCILLATOR TUNING RESISTOR (ADDRESS: 90h)
U-0
—
U-0
—
U-0
—
R/W-0
TUN4
R/W-0
TUN3
R/W-0
TUN2
R/W-0
TUN1
R/W-0
TUN0
bit 7
bit 0
bit 7-5
bit 4-0
Unimplemented: Read as ‘0’
TUN<4:0>: Frequency Tuning bits
01111= Maximum frequency
01110=
•
•
•
00001=
00000= Oscillator module is running at the calibrated frequency.
11111=
•
•
•
10000= Minimum frequency
Legend:
R = Readable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
- n = Value at POR
2004 Microchip Technology Inc.
Preliminary
DS41211B-page 23