PIC12F683
2.2.2
SPECIAL FUNCTION REGISTERS
FIGURE 2-2:
DATA MEMORY MAP OF
THE PIC12F683
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (see Table 2-1). These
registers are static RAM.
File
File
Address
Address
Indirect addr.(1)
Indirect addr.(1)
OPTION_REG
PCL
00h
01h
02h
80h
81h
82h
The special registers can be classified into two sets:
core and peripheral. The Special Function Registers
associated with the “core” are described in this section.
Those related to the operation of the peripheral
features are described in the section of that peripheral
feature.
TMR0
PCL
STATUS
FSR
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
STATUS
FSR
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
GPIO
TRISIO
PCLATH
INTCON
PIR1
PCLATH
INTCON
PIE1
TMR1L
TMR1H
T1CON
TMR2
PCON
OSCCON
OSCTUNE
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
WPU
IOC
WDTCON
CMCON0
CMCON1
VRCON
EEDAT
EEADR
EECON1
EECON2(1)
ADRESL
ADRESH
ADCON0
ANSEL
General
Purpose
Registers
32 Bytes
9Fh
A0h
BFh
General
Purpose
Registers
96 Bytes
F0h
FFh
Accesses 70h-7Fh
BANK 1
7Fh
BANK 0
Unimplemented data memory locations, read as ‘0’.
Note 1: Not a physical register.
DS41211B-page 8
Preliminary
2004 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
