PIC12F609/615/12HV609/615
8-Pin Diagram, PIC12F615/HV615 (PDIP, SOIC, TSSOP, DFN)
VDD
GP5/T1CKI/P1A*/OSC1/CLKIN
VSS
8
7
6
5
1
2
GP0/AN0/CIN+/P1B/ICSPDAT
GP1/AN1/CIN0-/VREF/ICSPCLK
GP2/AN2/T0CKI/INT/COUT/CCP1/P1A
PIC12F615/
HV615
GP4/AN3/CIN1-/T1G/P1B*/OSC2/CLKOUT
GP3/T1G*/MCLR/VPP
3
4
*
Alternate pin function.
TABLE 2:
PIC12F615/HV615 PIN SUMMARY (PDIP, SOIC, TSSOP, DFN)
I/O
Pin
Analog
Comparators
Timer
CCP
Interrupts Pull-ups
Basic
GP0
GP1
GP2
GP3(1)
GP4
GP5
—
7
6
5
4
3
2
1
8
AN0
AN1
AN2
—
CIN+
CIN0-
COUT
—
—
—
P1B
—
IOC
IOC
INT/IOC
IOC
IOC
IOC
—
Y
Y
ICSPDAT
ICSPCLK/VREF
—
T0CKI
T1G*
T1G
T1CKI
—
CCP1/P1A
—
Y
Y(2)
MCLR/VPP
OSC2/CLKOUT
OSC1/CLKIN
VDD
AN3
—
CIN1-
—
P1B*
P1A*
—
Y
Y
—
—
—
—
—
—
—
—
—
—
VSS
*
Alternate pin function.
Note 1: Input only.
2: Only when pin is configured for external MCLR.
© 2006 Microchip Technology Inc.
Preliminary
DS41302A-page 3