PIC12F609/615/12HV609/615
Program Memory
Data Memory
SRAM (bytes)
10-bit A/D
(ch)
Timers
8/16-bit
Device
I/O
Comparators
Voltage Range
Flash
(words)
PIC12F609
1024
1024
1024
1024
64
64
64
64
5
5
5
5
0
0
4
4
1
1
1
1
1/1
1/1
2/1
2/1
2.0V-5.5V
2.0V-user defined
2.0V-5.5V
PIC12HV609
PIC12F615
PIC12HV615
2.0V-user defined
8-Pin Diagram, PIC12F609/HV609 (PDIP, SOIC, TSSOP, DFN)
VDD
GP5/T1CKI/OSC1/CLKIN
GP4/CIN1-/T1G/OSC2/CLKOUT
GP3/MCLR/VPP
VSS
8
7
6
5
1
2
GP0/CIN+/ICSPDAT
GP1/CIN0-/ICSPCLK
GP2/T0CKI/INT/COUT
PIC12F609/
HV609
3
4
TABLE 1:
I/O
PIC12F609/HV609 PIN SUMMARY (PDIP, SOIC, TSSOP, DFN)
Pin
Comparators
Timer
Interrupts
Pull-ups
Basic
GP0
GP1
GP2
GP3(1)
GP4
GP5
—
7
6
5
4
3
2
1
8
CIN+
CIN0-
COUT
—
—
—
IOC
IOC
INT/IOC
IOC
IOC
IOC
—
Y
Y
ICSPDAT
ICSPCLK
—
T0CKI
—
Y
Y(2)
MCLR/VPP
OSC2/CLKOUT
OSC1/CLKIN
VDD
CIN1-
—
T1G
T1CKI
—
Y
Y
—
—
—
—
—
—
—
VSS
Note 1: Input only.
2: Only when pin is configured for external MCLR.
DS41302A-page 2
Preliminary
© 2006 Microchip Technology Inc.