PIC12F609/615/12HV609/615
TABLE 4-1:
SUMMARY OF REGISTERS ASSOCIATED WITH GPIO
Value on
all other
Resets
Value on
POR, BOR
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ANSEL
CMCON0
INTCON
IOC
—
CMON
GIE
ADCS2(1) ADCS1(1) ADCS0(1)
ANS3
—
ANS2(1)
CMR
ANS1
—
ANS0
CMCH
GPIF
-000 1111
0000 -0-0
0000 0000
--00 0000
-000 1111
0000 -0-0
0000 0000
--00 0000
COUT
PEIE
—
CMOE
T0IE
CMPOL
INTE
GPIE
IOC3
T0IF
INTF
IOC1
—
IOC5
IOC4
IOC2
IOC0
OPTION_REG
GPIO
GPPU
—
INTEDG
T0CS
GP5
TRISIO5
WPU5
—
T0SE
GP4
PSA
GP3
PS2
GP2
PS1
GP1
PS0
GP0
1111 1111
--x0 x000
--11 1111
--11 -111
---- 0---
---- 0000
---0 --00
1111 1111
--u0 u000
--11 1111
--11 -111
—
—
—
—
—
—
TRISIO
—
TRISIO4
WPU4
—
TRISIO3
—
TRISIO2
WPU2
—
TRISIO1
WPU1
—
TRISIO0
WPU0
—
WPU
—
T1CON
—
T1OSCEN
CCP1M3
—
CCP1CON
APFCON
—
—
—
CCP1M2 CCP1M1 CCP1M0
P1BSEL P1ASEL
—
—
T1GSEL
—
Legend:
x= unknown, u= unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by GPIO.
Note 1:
PIC12F615/HV615 only.
DS41302A-page 40
Preliminary
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
