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MCP4162T-502E/SN 参数 Datasheet PDF下载

MCP4162T-502E/SN图片预览
型号: MCP4162T-502E/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 7/8位单/双SPI数字电位器具有非易失性存储器 [7/8-Bit Single/Dual SPI Digital POT with Non-Volatile Memory]
分类和应用: 转换器电位器数字电位计存储电阻器光电二极管
文件页数/大小: 88 页 / 2259 K
品牌: MICROCHIP [ MICROCHIP ]
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MCP414X/416X/424X/426X  
7.7.1  
SINGLE INCREMENT  
7.7  
Increment Wiper  
Normal and High Voltage  
Typically, the CS pin starts at the inactive state (VIH),  
but may be already be in the active state due to the  
completion of another command.  
The Increment Command is an 8-bit command. The  
Increment Command can only be issued to volatile  
memory locations. The format of the command is  
shown in Figure 7-6.  
Figure 6-7 through Figure 6-8 show possible  
waveforms for a single increment. The increment  
operation requires that the CS pin be in the active state  
(VILor VIHH). Typically, the CS pin will be in the inactive  
state (VIH) and is driven to the active state (VILor VIHH).  
The 8-bit Increment Command (Command Byte) is  
then clocked in on the SDI pin by the SCK pins. The  
SDO pin drives the CMDERR bit on the 7th clock.  
An Increment Command to the volatile memory  
location changes that location after  
formatted command (8-clocks) have been received.  
a properly  
Increment commands provide a quick and easy  
method to modify the value of the volatile wiper location  
by +1 with minimal overhead.  
The wiper value will increment up to 100h on 8-bit  
devices and 80h on 7-bit devices. After the wiper value  
has reached Full Scale (8-bit =100h, 7-bit =80h), the  
wiper value will not be incremented further. If the Wiper  
register has a value between 101h and 1FFh, the  
Increment command is disabled. See Table 7-4 for  
additional information on the Increment Command  
versus the current volatile wiper value.  
COMMAND BYTE  
(INCR COMMAND (n+1) )  
A
D
3
A
D
2
A
D
1
A
D
0
0
1
X
X
SDI  
1
1
1
1
1
1
1
1
1
1
1
1
1*  
0
1
0
Note 1, 2  
Note 1, 3  
The Increment operations only require the Increment  
SDO  
command byte while the CS pin is active (VILor VIHH  
)
for a single increment.  
Note 1: Only functions when writing the volatile  
After the wiper is incremented to the desired position,  
the CS pin should be forced to VIH to ensure that  
unexpected transitions on the SCK pin do not cause  
the wiper setting to change. Driving the CS pin to VIH  
should occur as soon as possible (within device  
specifications) after the last desired increment occurs.  
wiper registers (AD3:AD0) 0h and 1h.  
2: Valid Address/Command combination.  
3: Invalid Address/Command combination  
all following SDO bits will be low until the  
CMDERR condition is cleared.  
(the CS pin is forced to the inactive  
state).  
TABLE 7-4:  
INCREMENT OPERATION VS.  
VOLATILE WIPER VALUE  
4: If a Command Error (CMDERR) occurs  
at this bit location (*), then all following  
SDO bits will be driven low until the CS  
pin is driven inactive (VIH).  
Current Wiper  
Setting  
Increment  
Wiper (W)  
Command  
Properties  
7-bit  
Pot  
8-bit  
Pot  
Operates?  
FIGURE 7-6:  
Increment Command -  
3FFh  
081h  
3FFh Reserved  
101h (Full-Scale (W = A))  
No  
No  
SDI and SDO States.  
080h  
100h Full-Scale (W = A)  
Note:  
Table 7-2 shows the valid addresses for  
the Increment Wiper command. Other  
addresses are invalid.  
07Fh  
041h  
0FFh W = N  
081  
040h  
080h W = N (Mid-Scale)  
Yes  
Yes  
03Fh  
001h  
07Fh W = N  
001  
000h  
000h Zero Scale (W = B)  
© 2008 Microchip Technology Inc.  
DS22059B-page 53  
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