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MCP1727-1202E/SN 参数 Datasheet PDF下载

MCP1727-1202E/SN图片预览
型号: MCP1727-1202E/SN
PDF下载: 下载PDF文件 查看货源
内容描述: 1.5A ,低电压,低静态电流LDO稳压器 [1.5A, Low Voltage, Low Quiescent Current LDO Regulator]
分类和应用: 线性稳压器IC调节器电源电路光电二极管输出元件
文件页数/大小: 32 页 / 787 K
品牌: MICROCHIP [ MICROCHIP ]
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MCP1727  
The maximum power dissipation capability for a  
package can be calculated given the junction-to-  
ambient thermal resistance and the maximum ambient  
temperature for the application. Equation 5-4 can be  
used to determine the package maximum internal  
power dissipation.  
5.3  
Typical Application  
Internal power dissipation, junction temperature rise,  
junction temperature and maximum power dissipation  
is calculated in the following example. The power  
dissipation as a result of ground current is small  
enough to be neglected.  
EQUATION 5-4:  
5.3.1  
POWER DISSIPATION EXAMPLE  
(TJ(MAX) TA(MAX)  
)
PD(MAX) = ---------------------------------------------------  
RθJA  
Package  
Package Type = 3x3DFN  
PD(MAX) = Maximum device power dissipation  
Input Voltage  
TJ(MAX) = maximum continuous junction  
temperature  
V
IN = 3.3V ± 5%  
LDO Output Voltage and Current  
TA(MAX) = maximum ambient temperature  
V
OUT = 2.5V  
OUT = 1.5A  
RθJA = Thermal resistance from junction to  
I
ambient  
Maximum Ambient Temperature  
A(MAX) = 60°C  
Internal Power Dissipation  
T
EQUATION 5-5:  
TJ(RISE) = PD(MAX) × RθJA  
PLDO(MAX) = (VIN(MAX) – VOUT(MIN)) x IOUT(MAX)  
PLDO = ((3.3V x 1.05) – (2.5V x 0.975))  
x 1.5A  
TJ(RISE) = Rise in device junction temperature  
over the ambient temperature  
PLDO = 1.54 Watts  
PD(MAX) = Maximum device power dissipation  
RθJA = Thermal resistance from junction to  
5.3.1.1  
Device Junction Temperature Rise  
ambient  
The internal junction temperature rise is a function of  
internal power dissipation and the thermal resistance  
from junction-to-ambient for the application. The  
thermal resistance from junction-to-ambient (RθJA) is  
derived from an EIA/JEDEC standard for measuring  
thermal resistance for small surface-mount packages.  
The EIA/JEDEC specification is JESD51-7 “High  
Effective Thermal Conductivity Test Board for Leaded  
Surface-Mount Packages”. The standard describes the  
test method and board specifications for measuring the  
thermal resistance from junction to ambient. The actual  
thermal resistance for a particular application can vary  
depending on many factors such as copper area and  
thickness. Refer to AN792, “A Method to Determine  
How Much Power a SOT23 Can Dissipate in an  
Application” (DS00792), for more information regarding  
this subject.  
EQUATION 5-6:  
TJ = TJ(RISE) + TA  
TJ = Junction temperature  
TJ(RISE) = Rise in device junction temperature  
over the ambient temperature  
TA = Ambient temperature  
T
J(RISE) = PTOTAL x RθJA  
TJRISE = 1.54 W x 41.0° C/W  
JRISE = 63.14°C  
T
© 2007 Microchip Technology Inc.  
DS21999B-page 21  
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