HCS200
After each 16-bit word is loaded, a programming delay
of TWC is required for the internal program cycle to
complete. At the end of the programming cycle, the
device can be verified (Figure 6-2) by reading back the
EEPROM. Reading is done by clocking the S2 line and
reading the data bits on PWM. Falling edge of S2 initi-
ated reading. For security reasons, it is not possible to
execute a verify function without first programming the
EEPROM. A verify operation can only be done
immediately following the program cycle.
6.0
PROGRAMMING THE HCS200
When using the HCS200 in a system, the user will have
to program some parameters into the device including
the serial number and the secret key before it can be
used. The programming cycle allows the user to input
all 192 bits in a serial data stream, which are then
stored internally in EEPROM. Programming will be
initiated by forcing the PWM line high, after the S2 line
has been held high for the appropriate length of time
line (Table 6-1 and Figure 6-1). After the program mode
is entered, a delay must be provided to the device for
the automatic bulk write cycle to complete. This will
write all locations in the EEPROM to an all zeros pat-
tern. The device can then be programmed by clocking
in 16 bits at a time, using S2 as the clock line and PWM
as the data in line. Data clocked in on falling edge of S2.
Note: To ensure that the device does not acci-
dentally enter programming mode (result-
ing in a bulk erase), PWM should never be
pulled high by the circuit connected to it.
Special care should be taken when driving
PNP RF transistors.
TABLE 6-1:
PROGRAMMING/VERIFY TIMING REQUIREMENTS
VDD = 5.0V ± 10%, 25°C ± 5 °C
Parameter
Symbol
Min.
Max.
Units
Program mode setup time
Hold time 1
Hold time 2
Bulk Write time
Program delay time
Program cycle time
Clock low time
Clock high time
Data setup time
Data hold time
TPS
TPH1
TPH2
TPBW
TPROG
TWC
TCLKL
TCLKH
TDS
3.5
3.5
50
—
—
—
25
25
0
4.5
—
—
3.5
3.5
36
—
ms
ms
µs
ms
ms
ms
µs
µs
µs
µs
µs
—
—
—
24
TDH
TDV
18
10
Data out valid time
FIGURE 6-1: PROGRAMMING WAVEFORMS
Enter Program
TPBW
Mode
TDS
TCLKH
TWC
S2
(Clock)
TPS
TPH1
TDH
TCLKL
PWM
(Data)
Bit 0
Bit 1
Bit 2
Bit 3
Bit 14 Bit 15
Bit 16 Bit 17
Data for Word 1
Data for Word 0 (KEY_0)
Repeat for each word (12 times)
TPH2
Note 1: Unused button inputs to be held to ground during the entire programming sequence.
2: The VDD pin must be taken to ground after a program/verify cycle.
FIGURE 6-2: VERIFY WAVEFORMS
Begin Verify Cycle Here
End of
Programming Cycle
Data in Word 0
PWM
(Data)
Bit190 Bit191
Bit 0
Bit 1 Bit 2 Bit 3
Bit 14
Bit 15
Bit 16 Bit 17
Bit190 Bit191
TWC
TDV
S2
(Clock)
Note: If a verify operation is to be done, then it must immediately follow the program cycle.
1996 Microchip Technology Inc.
Preliminary
DS40138A-page 9
MICROCHIP [ MICROCHIP ]
