ENC28J60
REGISTER 2-2:
PHLCON: PHY MODULE LED CONTROL REGISTER
R/W-0
R/W-0
r
R/W-1
r
R/W-1
r
R/W-0
R/W-1
R/W-0
R/W-0
r
LACFG3
LACFG2
LACFG1
LACFG0
bit 15
bit 8
R/W-0
LBCFG3
bit 7
R/W-0
R/W-1
R/W-0
R/W-0
R/W-0
R/W-1
R/W-x
r
LBCFG2
LBCFG1
LBCFG0
LFRQ1
LFRQ0
STRCH
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 15-14
bit 13-12
bit 11-8
Reserved: Write as ‘0’
Reserved: Write as ‘1’
LACFG3:LACFG0: LEDA Configuration bits
1111= Reserved
1110= Display duplex status and collision activity (always stretched)
1101= Display link status and transmit/receive activity (always stretched)
1100= Display link status and receive activity (always stretched)
1011= Blink slow
1010= Blink fast
1001= Off
1000= On
0111= Display transmit and receive activity (stretchable)
0110= Reserved
0101= Display duplex status
0100= Display link status
0011= Display collision activity (stretchable)
0010= Display receive activity (stretchable)
0001= Display transmit activity (stretchable)
0000= Reserved
bit 7-4
LBCFG3:LBCFG0: LEDB Configuration bits
1110= Display duplex status and collision activity (always stretched)
1101= Display link status and transmit/receive activity (always stretched)
1100= Display link status and receive activity (always stretched)
1011= Blink slow
1010= Blink fast
1001= Off
1000= On
0111= Display transmit and receive activity (stretchable)
0110= Reserved
0101= Display duplex status
0100= Display link status
0011= Display collision activity (stretchable)
0010= Display receive activity (stretchable)
0001= Display transmit activity (stretchable)
0000= Reserved
bit 3-2
LFRQ1:LFRQ0: LED Pulse Stretch Time Configuration bits (see Table 2-1)
11= Reserved
10= Stretch LED events by TLSTRCH
01= Stretch LED events by TMSTRCH
00= Stretch LED events by TNSTRCH
bit 1
bit 0
STRCH: LED Pulse Stretching Enable bit
1= Stretchable LED events will cause lengthened LED pulses based on LFRQ1:LFRQ0 configuration
0= Stretchable LED events will only be displayed while they are occurring
Reserved: Write as ‘0’
© 2006 Microchip Technology Inc.
Preliminary
DS39662B-page 9