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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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Table 12-6 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to fast PWM mode.  
Table 12-6. Compare Output Mode, Fast PWM Mode(1)  
COM0B1  
COM0B0  
Description  
0
0
1
1
0
1
0
1
Normal port operation, OC0B disconnected.  
Reserved  
Clear OC0B on compare match, set OC0B at TOP  
Set OC0B on compare match, clear OC0B at TOP  
Note:  
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the compare match is  
ignored, but the set or clear is done at TOP. See Section 12.6.3 “Fast PWM Mode” on page 83 for more details.  
Table 12-7 shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase correct PWM mode.  
Table 12-7. Compare Output Mode, Phase Correct PWM Mode(1)  
COM0B1  
COM0B0  
Description  
0
0
0
1
Normal port operation, OC0B disconnected.  
Reserved  
Clear OC0B on compare match when up-counting. Set OC0B on compare match  
when down-counting.  
1
1
0
1
Set OC0B on compare match when up-counting. Clear OC0B on compare match  
when down-counting.  
Note:  
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the compare match is  
ignored, but the set or clear is done at TOP. See Section 12.6.4 “Phase Correct PWM Mode” on page 84 for  
more details.  
• Bits 3, 2 – Res: Reserved Bits  
These bits are reserved bits in the ATmega16/32/64/M1/C1 and will always read as zero.  
• Bits 1:0 – WGM01:0: Waveform Generation Mode  
Combined with the WGM02 bit found in the TCCR0B register, these bits control the counting sequence of the counter, the  
source for maximum (TOP) counter value, and what type of waveform generation to be used, see Table 12-8. Modes of  
operation supported by the Timer/Counter unit are: Normal mode (counter), clear timer on compare match (CTC) mode, and  
two types of pulse width modulation (PWM) modes (see Section 12.6 “Modes of Operation” on page 81).  
Table 12-8. Waveform Generation Mode Bit Description  
Timer/Counter  
Mode of Operation  
Update of  
OCRx at  
TOV Flag  
Set on(1)(2)  
Mode  
WGM02  
WGM01  
WGM00  
TOP  
0xFF  
0xFF  
OCRA  
0xFF  
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Normal  
Immediate  
TOP  
MAX  
BOTTOM  
MAX  
PWM, phase correct  
CTC  
Immediate  
TOP  
Fast PWM  
MAX  
Reserved  
PWM, phase correct  
Reserved  
OCRA  
TOP  
BOTTOM  
Fast PWM  
OCRA  
TOP  
TOP  
Notes: 1. MAX  
= 0xFF  
2. BOTTOM = 0x00  
88  
ATmega16/32/64/M1/C1 [DATASHEET]  
7647O–AVR–01/15  
 
 
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