13. 16-bit Timer/Counter1 with PWM
The 16-bit Timer/Counter unit allows accurate program execution timing (event management), wave generation, and signal
timing measurement. The main features are:
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True 16-bit design (i.e., allows 16-bit PWM)
Two independent output compare units
Double buffered output compare registers
One input capture unit
Input capture noise canceler
Retriggering function by external signal (ICP1A or ICP1B)
Clear timer on compare match (auto reload)
Glitch-free, phase correct pulse width modulator (PWM)
Variable PWM period
Frequency generator
External event counter
Four independent interrupt sources (TOV1, OCF1A, OCF1B, and ICF1)
13.1 Overview
Most register and bit references in this section are written in general form. A lower case “n” replaces the Timer/Counter
number, and a lower case “x” replaces the output compare unit channel. However, when using the register or bit defines in a
program, the precise form must be used, i.e., TCNT1 for accessing Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in Figure 13-1. For the actual placement of I/O pins, refer to
Section 1.1 “Pin Descriptions” on page 5. CPU accessible I/O registers, including I/O bits and I/O pins, are shown in bold.
The device-specific I/O register and bit locations are listed in Section 13.10 “16-bit Timer/Counter Register Description” on
page 110.
The PRTIM1 bit in Section 6.6 “Power Reduction Register” on page 36 must be written to zero to enable Timer/Counter1
module.
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ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15