Table 8-2 shows reset and Interrupt Vectors placement for the various combinations of BOOTRST and IVSEL settings. If the
program never enables an interrupt source, the interrupt vectors are not used, and regular program code can be placed at
these locations. This is also the case if the reset vector is in the application section while the interrupt vectors are in the boot
section or vice versa.
Table 8-2. Reset and Interrupt Vectors Placement in ATmega16/32/64/M1/C1(1)
BOOTRST
IVSEL
Reset Address
0x000
Interrupt Vectors Start Address
0x001
1
1
0
0
0
1
0
1
0x000
Boot reset address + 0x002
0x001
Boot reset address
Boot reset address
Boot reset address + 0x002
Note:
1. The boot reset address is shown in Table 24-4 on page 244. For the BOOTRST fuse “1” means unprogrammed
while “0” means programmed.
The most typical and general program setup for the Reset and Interrupt Vector Addresses in ATmega16/32/64/M1/C1 is:
Address Labels Code Comments
; Reset Handler
0x000
0x002
0x004
0x006
0x008
0x00A
0x00C
0x00E
0x010
0x012
0x014
0x016
0x018
0x01A
0x01C
0x01E
0x020
0x022
0x024
0x026
0x028
0x02A
0x02C
0x02E
0x030
0x032
0x034
0x036
0x038
0x03A
0x03C
;
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
RESET
ANA_COMP_0
ANA_COMP_1
ANA_COMP_2
ANA_COMP_3
PSC_FAULT
PSC_EC
EXT_INT0
EXT_INT1
EXT_INT2
EXT_INT3
TIM1_CAPT
TIM1_COMPA
TIM1_COMPB
TIM1_OVF
TIM0_COMPA
TIM0_COMPB
TIM0_OVF
CAN_INT
CAN_TOVF
LIN_TC
LIN_ERR
PCINT0
PCINT1
PCINT2
PCINT3
SPI_STC
ADC
WDT
EE_RDY
SPM_RDY
; analog comparator 0 Handler
; analog comparator 1 Handler
; analog comparator 2 Handler
; analog comparator 3 Handler
; PSC Fault Handler
; PSC End of Cycle Handler
; IRQ0 Handler
; IRQ1 Handler
; IRQ2 Handler
; IRQ3 Handler
; Timer1 Capture Handler
; Timer1 Compare A Handler
; Timer1 Compare B Handler
; Timer1 Overflow Handler
; Timer0 Compare A Handler
; Timer0 Compare B Handler
; Timer0 Overflow Handler
; CAN MOB,Burst,General Errors Handler
; CAN Timer Overflow Handler
; LIN Transfer Complete Handler
; LIN Error Handler
; Pin Change Int Request 0 Handler
; Pin Change Int Request 1 Handler
; Pin Change Int Request 2 Handler
; Pin Change Int Request 3 Handler
; SPI Transfer Complete Handler
; ADC Conversion Complete Handler
; Watchdog Timer Handler
; EEPROM Ready Handler
; Store Program Memory Ready Handler
0x03E RESET: ldi
r16, high(RAMEND)
SPH,r16
r16, low(RAMEND)
SPL,r16
; Main program start
; Set Stack Pointer to top of RAM
0x03F
0x040
0x041
0x042
0x043
...
out
ldi
out
sei
<instr> xxx
... ...
; Enable interrupts
...
48
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15