4. CRC calculation of diagnostic frames in LIN 2.x.
Diagnostic frames of LIN 2.x use “classic checksum” calculation. Unfortunately, the setting of the checksum model
is enabled when the HEADER is transmitted/received. Usually, in LIN 2.x the LIN/UART controller is initialized to
process “enhanced checksums” and a slave task does not know what kind of frame it will work on before checking
the ID.
Problem fix / workaround
This workaround is to be implemented only in case of transmission/reception of diagnostics frames.
a. Slave task of master node:
Before enabling the HEADER, the master must set the appropriate LIN13 bitvalue in LINCR register.
b. For slaves nodes, the workaround is in 2 parts:
●
Before enabling the RESPONSE, use the following function:
void lin_wa_head(void) {
unsigned char temp;
temp = LINBTR;
LINCR = 0x00;
// It is not a RESET !
LINBTR = (1<<LDISR)|temp;
LINCR = (1<<LIN13)|(1<<LENA)|(0<<LCMD2)|(0<<LCMD1)|(0<<LCMD0);
LINDLR = 0x88;
// If it isn't already done
}
●
Once the RESPONSE is received or sent (having RxOK or TxOK as well as LERR), use the following
function:
void lin_wa_tail(void)
LINCR = 0x00;
{
// It is not a RESET !
LINBTR = 0x00;
LINCR = (0<<LIN13)|(1<<LENA)|(0<<LCMD2)|(0<<LCMD1)|(0<<LCMD0);
}
The time-out counter is disabled during the RESPONSE when the workaround is set.
5. Wrong TSOFFSET manufacturing calibration value.
Erroneous value of TSOFFSET programmed in signature byte.
(TSOFFSET was introduced from REVB silicon).
Problem fix / workaround
To identify RevB with wrong TSOFFSET value, check device signature byte at address 0X3F if value is not 0X42
(Ascii code ‘B’) then use the following formula.
TS_OFFSET(True) = (150*(1-TS_GAIN))+TS_OFFSET.
6. PD0-PD3 set to outputs and PD4 pulled down following power-on with external reset active.
At power-on with the external reset signal active the four I/O lines PD0-PD3 may be forced into an output state.
Normally these lines should be in an input state. PD4 may be pulled down with internal 220k resistor. Following
release of the reset line (whatever is the startup time) with the clock running the I/Os PD0-PD4 will adopt their
intended input state.
Problem fix / workaround
None
7. LIN Break Delimitter
In SLAVE MODE, a BREAK field detection error can occur under following conditions. The problem occurs if 2
conditions occur simultaneously:
a. The DOMINANT part of the BREAK is (N+0.5)*Tbit long with N=13, 14,15, ...
b. The RECESSIVE part of the BREAK (BREAK DELIMITER) is equal to 1*Tbit. (see note below)
The BREAK_high is not detected, and the 2nd bit of the SYNC field is interpreted as the BREAK DELIMITER. The
error is detected as a framing error on the first bits of the PID or on subsequent Data or a Checksum error.
There is no error if BREAK_high is greater than 1*Tbit + 18%. There is no problem in Master mode.
Note:
LIN2.1 Protocol Specification paragraph 2.3.1.1 Break field says: “A break field is always generated by the
master task(in the master node) and it shall be at least 13 nominal bit times of dominant value, followed by a
break delimiter, as shown in Figure 30-1 on page 308. The break delimiter shall be at least one nominal bit
time long.”
ATmega16/32/64/M1/C1 [DATASHEET]
307
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
