25.6 Parallel Programming Parameters, Pin Mapping, and Commands
This section describes how to parallel program and verify flash program memory, EEPROM data memory, memory lock bits,
and fuse bits in the ATmega16/32/64/M1/C1. Pulses are assumed to be at least 250ns unless otherwise noted.
25.6.1 Signal Names
In this section, some pins of the ATmega16/32/64/M1/C1 are referenced by signal names describing their functionality
during parallel programming, see Figure 25-1 and Table 25-8. Pins not described in the following table are referenced by pin
names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse. The bit coding is shown in
Table 25-10 on page 260. When pulsing WR or OE, the command loaded determines the action executed. The different
Commands are shown in Table 25-11 on page 260.
Figure 25-1. Parallel Programming
+ 5V
RDY/BSY
OE
PD1
PD2
PD3
PD4
PD5
PD6
PD7
VCC
+ 5V
WR
AVCC
BS1
XA0
PB[7:0]
DATA
XA1
PAGEL
+12V
BS2
RESET
PA0
XTAL1
GND
Table 25-8. Pin Name Mapping
Signal Name in
Programming Mode
Pin Name
I/O Function
0: Device is busy programming, 1: Device is ready for
new command
RDY/BSY
PD1
O
OE
WR
PD2
PD3
PD4
PD5
PD6
PD7
I
I
I
I
I
I
Output enable (active low)
Write pulse (active low)
BS1
Byte select 1 (“0” selects low byte, “1” selects high byte)
XTAL action bit 0
XA0
XA1
XTAL action bit 1
PAGEL
Program memory and EEPROM data page load
Byte select 2 (“0” selects low byte, “1” selects 2’nd high
byte)
BS2
PE2
I
DATA
PB[7:0]
I/O Bi-directional data bus (output when OE is low)
ATmega16/32/64/M1/C1 [DATASHEET]
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