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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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25. Memory Programming  
25.1 Program and Data Memory Lock Bits  
The ATmega16/32/64/M1/C1 provides six Lock bits which can be left unprogrammed (“1”) or can be programmed (“0”) to  
obtain the additional features listed in Table 25-2. The Lock bits can only be erased to “1” with the chip erase command.  
Table 25-1. Lock Bit Byte(1)  
Lock Bit Byte  
Bit No  
Description  
Default Value  
7
6
5
4
3
2
1
0
1 (unprogrammed)  
1 (unprogrammed)  
1 (unprogrammed)  
1 (unprogrammed)  
1 (unprogrammed)  
1 (unprogrammed)  
1 (unprogrammed)  
1 (unprogrammed)  
BLB12  
BLB11  
BLB02  
BLB01  
LB2  
Boot lock bit  
Boot lock bit  
Boot lock bit  
Boot lock bit  
Lock bit  
LB1  
Lock bit  
Notes: 1. “1” means unprogrammed, “0” means programmed.  
Table 25-2. Lock Bit Protection Modes(1)(2)  
Memory Lock Bits  
LB Mode  
LB2  
LB1  
Protection Type  
1
1
1
No memory lock features enabled.  
Further programming of the flash and EEPROM is disabled in parallel and  
serial programming mode. The fuse bits are locked in both serial and parallel  
programming mode(1).  
2
3
1
0
0
0
Further programming and verification of the flash and EEPROM is disabled in  
parallel and serial programming mode. The boot lock bits and fuse bits are  
locked in both serial and parallel programming mode(1).  
Notes: 1. Program the fuse bits and boot lock bits before programming the LB1 and LB2.  
2. “1” means unprogrammed, “0” means programmed.  
Table 25-3. Lock Bit Protection Modes(1)(2)  
.
BLB0 Mode  
BLB02  
BLB01  
1
2
1
1
1
0
No restrictions for SPM or LPM accessing the Application section.  
SPM is not allowed to write to the Application section.  
SPM is not allowed to write to the Application section, and LPM executing from  
the Boot Loader section is not allowed to read from the Application section. If  
Interrupt Vectors are placed in the Boot Loader section, interrupts are disabled  
while executing from the Application section.  
3
4
0
0
0
1
LPM executing from the Boot Loader section is not allowed to read from the  
Application section. If Interrupt Vectors are placed in the Boot Loader section,  
interrupts are disabled while executing from the Application section.  
Notes: 1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.  
2. “1” means unprogrammed, “0” means programmed  
ATmega16/32/64/M1/C1 [DATASHEET]  
255  
7647O–AVR–01/15  
 
 
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