25.8.3 Chip Erase
The chip erase will erase the flash and EEPROM(1) memories plus lock bits. The lock bits are not reset until the program
memory has been completely erased. The fuse bits are not changed. A chip erase must be performed before the flash
and/or EEPROM are reprogrammed.
Note:
1. The EEPRPOM memory is preserved during chip erase if the EESAVE fuse is programmed.
Load command “Chip Erase”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “1000 0000”. This is the command for chip erase.
4. Give XTAL1 a positive pulse. This loads the command.
5. Give WR a negative pulse. This starts the chip erase. RDY/BSY goes low.
6. Wait until RDY/BSY goes high before loading a new command.
25.8.4 Programming the Flash
The flash is organized in pages, see Table 25-12 on page 260. When programming the flash, the program data is latched
into a page buffer. This allows one page of program data to be programmed simultaneously. The following procedure
describes how to program the entire flash memory:
A. Load command “Write Flash”
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set BS1 to “0”.
3. Set DATA to “0001 0000”. This is the command for write flash.
4. Give XTAL1 a positive pulse. This loads the command.
B. Load address low byte
1. Set XA1, XA0 to “00”. This enables address loading.
2. Set BS1 to “0”. This selects low address.
3. Set DATA = Address low byte (0x00 - 0xFF).
4. Give XTAL1 a positive pulse. This loads the address low byte.
C. Load data low byte
5. Set XA1, XA0 to “01”. This enables data loading.
6. Set DATA = Data low byte (0x00 - 0xFF).
7. Give XTAL1 a positive pulse. This loads the data byte.
D. Load data high byte
1. Set BS1 to “1”. This selects high data byte.
2. Set XA1, XA0 to “01”. This enables data loading.
3. Set DATA = Data high byte (0x00 - 0xFF).
4. Give XTAL1 a positive pulse. This loads the data byte.
E. Latch data
1. Set BS1 to “1”. This selects high data byte.
2. Give PAGEL a positive pulse. This latches the data bytes. (See Figure 25-3 on page 264 for signal waveforms)
F. Repeat B through E until the entire buffer is filled or until all data within the page is loaded.
While the lower bits in the address are mapped to words within the page, the higher bits address the pages within the
FLASH. This is illustrated in Figure 25-2. Note that if less than eight bits are required to address words in the page (pagesize
< 256), the most significant bit(s) in the address low byte are used to address the page when performing a page write.
262
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
