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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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21.2 Operation  
The digital to analog converter generates an analog signal proportional to the value of the DAC registers value.  
In order to have an accurate sampling frequency control, there is the possibility to update the DAC input values through  
different trigger events.  
21.3 Starting a Conversion  
The DAC is configured thanks to the DACON register. As soon as the DAEN bit in DACON register is set, the DAC converts  
the value present on the DACH and DACL registers in accordance with the register DACON setting.  
Alternatively, a conversion can be triggered automatically by various sources. Auto triggering is enabled by setting the DAC  
auto trigger enable bit, DAATE in DACON. The trigger source is selected by setting the DAC Trigger Select bits, DATS in  
DACON (See description of the DATS bits for a list of the trigger sources). When a positive edge occurs on the selected  
trigger signal, the DAC converts the value present on the DACH and DACL registers in accordance with the register DACON  
setting. This provides a method of starting conversions at fixed intervals.  
If the trigger signal is still set when the conversion completes, a new conversion will not be started. If another positive edge  
occurs on the trigger signal during conversion, the edge will be ignored.  
Note that an interrupt flag will be set even if the specific interrupt is disabled or the global interrupt enable bit in SREG is  
cleared. A conversion can thus be triggered without causing an interrupt. However, the interrupt flag must be cleared in order  
to trigger a new conversion at the next interrupt event.  
21.3.1 DAC Voltage Reference  
The reference voltage for the ADC (VREF) indicates the conversion range for the DAC. VREF can be selected as either AVCC  
internal 2.56V reference, or external AREF pin.  
,
AVCC is connected to the DAC through a passive switch. The internal 2.56V reference is generated from the internal  
bandgap reference (VBG) through an internal amplifier. In either case, the external AREF pin is directly connected to the  
DAC, and the reference voltage can be made more immune to noise by connecting a capacitor between the AREF pin and  
ground. VREF can also be measured at the AREF pin with a high impedant voltmeter. Note that VREF is a high impedant  
source, and only a capacitive load should be connected in a system.  
If the user has a fixed voltage source connected to the AREF pin, the user may not use the other reference voltage options  
in the application, as they will be shorted to the external voltage. If no external voltage is applied to the AREF pin, the user  
may switch between AVCC and 2.56V as reference selection. The first DAC conversion result after switching reference  
voltage source may be inaccurate, and the user is advised to discard this result.  
21.4 DAC Register Description  
The DAC is controlled via three dedicated registers:  
The DACON register which is used for DAC configuration  
DACH and DACL which are used to set the value to be converted.  
21.4.1 Digital to Analog Conversion Control Register – DACON  
Bit  
7
DAATE  
R/W  
0
6
DATS2  
R/W  
0
5
DATS1  
R/W  
0
4
DATS0  
R/W  
0
3
-
2
DALA  
R/W  
0
1
DAOE  
R/W  
0
0
DAEN  
R/W  
0
DACON  
Read/Write  
Initial Value  
-
0
• Bit 7 – DAATE: DAC Auto Trigger Enable bit  
Set this bit to update the DAC input value on the positive edge of the trigger signal selected with the DACTS2-0 bit in  
DACON register. Clear it to automatically update the DAC input when a value is written on DACH register.  
• Bit 6:4 – DATS2, DATS1, DATS0: DAC Trigger Selection bits  
These bits are only necessary in case the DAC works in auto trigger mode. It means if DAATE bit is set.  
234  
ATmega16/32/64/M1/C1 [DATASHEET]  
7647O–AVR–01/15  
 
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