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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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Table 20-8. Analog Comparator 3 Negative Input Selection  
AC3M2  
AC3M1  
AC3M0  
Description  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
“Vref”/6.40  
“Vref”/3.20  
“Vref”/2.13  
“Vref”/1.60  
Bandgap (1.1V)  
DAC result  
Analog comparator Negative Input (ACMPM pin)  
Reserved  
20.4.5 Analog Comparator Status Register – ACSR  
Bit  
7
AC3IF  
R/W  
0
6
AC2IF  
R/W  
0
5
AC1IF  
R/W  
0
4
AC0IF  
R/W  
0
3
AC3O  
R
2
AC2O  
R
1
AC1O  
R
0
AC0O  
R
ACSR  
Read/Write  
Initial Value  
0
0
0
0
• Bit 7– AC3IF: Analog Comparator 3 Interrupt Flag Bit  
This bit is set by hardware when comparator 3 output event triggers off the interrupt mode defined by AC3IS1 and AC3IS0  
bits in AC2CON register.  
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the AC3IE in AC3CON register  
is set. Anyway, this bit is cleared by writing a logical one on it.  
This bit can also be used to synchronize ADC or DAC conversions.  
• Bit 6– AC2IF: Analog Comparator 2 Interrupt Flag Bit  
This bit is set by hardware when comparator 2 output event triggers off the interrupt mode defined by AC2IS1 and AC2IS0  
bits in AC2CON register.  
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the AC2IE in AC2CON register  
is set. Anyway, this bit is cleared by writing a logical one on it.  
This bit can also be used to synchronize ADC or DAC conversions.  
• Bit 5– AC1IF: Analog Comparator 1 Interrupt Flag Bit  
This bit is set by hardware when comparator 1 output event triggers off the interrupt mode defined by AC1IS1 and AC1IS0  
bits in AC1CON register.  
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the AC1IE in AC1CON register  
is set. Anyway, this bit is cleared by writing a logical one on it.  
This bit can also be used to synchronize ADC or DAC conversions.  
• Bit 4– AC0IF: Analog Comparator 0 Interrupt Flag Bit  
This bit is set by hardware when comparator 0 output event triggers off the interrupt mode defined by AC0IS1 and AC0IS0  
bits in AC0CON register.  
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the AC0IE in AC0CON register  
is set. Anyway, this bit is cleared by writing a logical one on it.  
This bit can also be used to synchronize ADC or DAC conversions.  
• Bit 3– AC3O: Analog Comparator 3 Output Bit  
AC3O bit is directly the output of the analog comparator 2.  
Set when the output of the comparator is high.  
Cleared when the output comparator is low.  
• Bit 2– AC2O: Analog Comparator 2 Output Bit  
AC2O bit is directly the output of the analog comparator 2.  
Set when the output of the comparator is high.  
Cleared when the output comparator is low.  
ATmega16/32/64/M1/C1 [DATASHEET]  
231  
7647O–AVR–01/15  
 
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