20.3 Use of ADC Amplifiers
Thanks to AMPCMP0 configuration bit, comparator 0 positive input can be connected to amplifier O output. In that case, the
clock of comparator 0 is twice the amplifier 0 clock. See Section 18.11.1 “Amplifier 0 control and status register – AMP0CSR”
on page 218.
Thanks to AMPCMP1 configuration bit, comparator 1 positive input can be connected to amplifier 1 output. In that case, the
clock of comparator 1 is twice the amplifier 1 clock. See Section 18.11.2 “Amplifier 1 Control and Status Register –
AMP1CSR” on page 219.
Thanks to AMPCMP2 configuration bit, comparator 2 positive input can be connected to amplifier 2 output. In that case, the
clock of comparator 2 is twice the amplifier 2 clock. See Section 18.11.2 “Amplifier 1 Control and Status Register –
AMP1CSR” on page 219.
20.4 Analog Comparator Register Description
Each analog comparator has its own control register.
A dedicated register has been designed to consign the outputs and the flags of the 4 analog comparators.
20.4.1 Analog Comparator 0 Control Register – AC0CON
Bit
7
AC0EN
R/W
0
6
AC0IE
R/W
0
5
4
3
2
1
0
AC0IS1 AC0IS0 ACCKSEL AC0M2 AC0M1 AC0M0 AC0CON
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
• Bit 7– AC0EN: analog comparator 0 Enable Bit
Set this bit to enable the analog comparator 0.
Clear this bit to disable the analog comparator 0.
• Bit 6– AC0IE: analog comparator 0 Interrupt Enable bit
Set this bit to enable the analog comparator 0 interrupt.
Clear this bit to disable the analog comparator 0 interrupt.
• Bit 5, 4– AC0IS1, AC0IS0: analog comparator 0 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
The different setting are shown in Table 18-7.
Table 20-1. Interrupt Sensitivity Selection
AC0IS1
AC0IS0
Description
0
0
1
1
0
1
0
1
Comparator interrupt on output toggle
Reserved
Comparator interrupt on output falling edge
Comparator interrupt on output rising edge
• Bit 3 – ACCKSEL: Analog Comparator Clock Select
Set this bit to use the 16MHz PLL output as comparator clock. Clear this bit to use the CLKIO as comparator clock.
• Bit 2, 1, 0– AC0M2, AC0M1, AC0M0: Analog Comparator 0 Multiplexer Register
These 3 bits determine the input of the negative input of the analog comparator.
The different setting are shown in Table 20-2 on page 228.
ATmega16/32/64/M1/C1 [DATASHEET]
227
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
