Figure 20-1. Analog Comparator Block Diagram(1)(2)
AC0O
AC0IF
CLK (/2)
I/O
ACMP0
+
-
Analog
Comparator 0
Interrupt
Interrupt Sensitivity Control
ACMPN0
AMP0
+
AC0IE
AC0EM
AC0IS1
AC0IS0
-
AMPCMP0
AMPCMP0
ADC
AC0M
2 1 0
AC1O
AC1IF
CLK (/2)
I/O
ACMP1
+
-
Analog
Comparator 1
Interrupt
Interrupt Sensitivity Control
ACMPN1
AMP1
AC1IE
+
-
T1 Capture
Trigger
AC1EM
AC1IS1
AC1IS0
AMPCMP1
AMPCMP1
ADC
AC1ICE
AC1M
2 1 0
AC2O
AC2IF
CLK (/2)
I/O
ACMP2
+
-
Analog
Comparator 2
Interrupt
Interrupt Sensitivity Control
ACMPN2
AMP2
AC2IE
+
-
AC2EM
AC2IS1
AC2IS0
AMPCMP2
AMPCMP2
ADC
AC2M
2 1 0
AC3O
AC3IF
CLK (/2)
I/O
+
-
ACMP3
Analog
Comparator 3
Interrupt
Interrupt Sensitivity Control
ACMPN3
AC3IE
AC3EM
AC3IS1
AC3IS0
DAC Result
Bandgap
AC3M
2 1 0
Aref
AVcc
/1.60
/2.13
/3.20
/6.40
Internal 2.56V
Reference
REFS1
REFS0
Notes: 1. ADC multiplexer output: see Table 18-5 on page 211.
2. Refer to Figure 1-1 on page 3 and for analog comparator pin placement.
3. The voltage on Vref is defined in 18-4 “ADC Voltage Reference Selection” on page 210
226
ATmega16/32/64/M1/C1 [DATASHEET]
7647O–AVR–01/15
MICROCHIP [ MICROCHIP ]
