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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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Table 18-11. AMP1 Clock Source Selection  
AMP1TS2  
AMP1TS1  
AMP1TS0  
Clock Source  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
ADC clock/8  
Timer/Counter0 compare match  
Timer/Counter0 overflow  
Timer/Counter1 compare match B  
Timer/Counter1 overflow  
PSC module 0 synchronization signal (PSS0)  
PSC module 1 synchronization signal (PSS1)  
PSC module 2 synchronization signal (PSS2)  
18.11.3 Amplifier 2 Control and Status Register – AMP2CSR  
Bit  
7
6
5
4
3
2
1
0
AMP2EN AMP2IS AMP2G1 AMP2G0 AMPCMP2 AMP2TS2 AMP2TS1 AMP2TS0 AMP2CSR  
Read/Write  
Initial Value  
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
• Bit 7 – AMP2EN: Amplifier 2 Enable Bit  
Set this bit to enable the Amplifier 2.  
Clear this bit to disable the Amplifier 2.  
Clearing this bit while a conversion is running will take effect at the end of the conversion.  
Warning: Always clear AMP2TS0:1 when clearing AMP2EN.  
• Bit 6 – AMP2IS: Amplifier 2 Input Shunt  
Set this bit to short-circuit the Amplifier 2 input.  
Clear this bit to normally use the Amplifier 2.  
• Bit 5, 4 – AMP2G1, 0: Amplifier 2 Gain Selection Bits  
These 2 bits determine the gain of the amplifier 2.  
The different setting are shown in Table 18-12.  
Table 18-12. Amplifier 2 Gain Selection  
AMP2G1  
AMP2G0  
Description  
Gain 5  
0
0
1
1
0
1
0
1
Gain 10  
Gain 20  
Gain 40  
To ensure an accurate result, after the gain value has been changed, the amplifier input needs to have a quite stable input  
value during at least 4 Amplifier synchronization clock periods.  
• Bit 3 – AMPCMP2: Amplifier 2 - Comparator 2 connection  
Set this bit to connect the amplifier 2 to the comparator 2 positive input. In this configuration the comparator clock is twice the  
amplifier clock. Clear this bit to normally use the Amplifier 2.  
• Bit 2:0 – AMP2TS2,AMP2TS1, AMP2TS0: Amplifier 2 Clock Source Selection Bits  
In accordance with Table 18-13 on page 221, these 3 bits select the event which will generate the clock for the amplifier 1.  
This clock source is necessary to start the conversion on the amplified channel.  
220  
ATmega16/32/64/M1/C1 [DATASHEET]  
7647O–AVR–01/15  
 
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