18. Analog to Digital Converter - ADC
18.1 Features
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10-bit resolution
0.8 LSB integral non-linearity (at 2Mhz)
±3.2 LSB absolute accuracy
8 to 250µs conversion time
Up to 125kSPS at maximum resolution
11 multiplexed single ended input channels
3 differential input channels with programmable gain 5, 10, 20 and 40
Optional left adjustment for ADC result readout
0 to VCC ADC input voltage range
Selectable 2.56 V ADC reference voltage
Free running or single conversion mode
ADC start conversion by auto triggering on interrupt sources
Interrupt on ADC conversion complete
Sleep mode noise canceler
Temperature sensor
LIN address sense (ISRC voltage measurement)
VCC voltage measurement
The ATmega16/32/64/M1/C1 features a 10-bit successive approximation ADC. The ADC is connected to an 15-channel
analog multiplexer which allows eleven single-ended input. The single-ended voltage inputs refer to 0V (GND).
The device also supports 3 differential voltage input amplifiers which are equipped with a programmable gain stage,
providing amplification steps of 14dB (5x), 20dB (10x), 26dB (20x), or 32dB (40x) on the differential input voltage before the
A/D conversion. On the amplified channels, 8-bit resolution can be expected.
The ADC contains a sample and hold circuit which ensures that the input voltage to the ADC is held at a constant level
during conversion. A block diagram of the ADC is shown in Figure 18-1 on page 198.
The ADC has a separate analog supply voltage pin, AVCC. AVCC must not differ more than ±0.3V from VCC. See Section 18.6
“ADC Noise Canceler” on page 203 on how to connect this pin.
Internal reference voltages of nominally 2.56V or AVCC are provided on-chip. The voltage reference may be externally
decoupled at the AREF pin by a capacitor (e.g., 10nF) for better noise performance. In any case this capacitor shout not be
greater than 10% of the AVCC smoothing capacitor.
ATmega16/32/64/M1/C1 [DATASHEET]
197
7647O–AVR–01/15