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ATMEGA16M1-15MZ 参数 Datasheet PDF下载

ATMEGA16M1-15MZ图片预览
型号: ATMEGA16M1-15MZ
PDF下载: 下载PDF文件 查看货源
内容描述: [IC MCU 8BIT 16KB FLASH 32QFN]
分类和应用: 微控制器
文件页数/大小: 318 页 / 7595 K
品牌: MICROCHIP [ MICROCHIP ]
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16.10.5 CAN Enable MOb Registers - CANEN2 and CANEN1  
Bit  
7
-
6
-
5
4
3
2
1
0
ENMOB5 ENMOB4 ENMOB3 ENMOB2 ENMOB1 ENMOB0 CANEN2  
-
-
-
13  
R
0
-
12  
R
0
-
11  
R
0
-
10  
R
0
-
-
CANEN1  
Bit  
15  
R
0
14  
R
0
9
R
0
R
0
8
R
0
R
0
Read/Write  
Initial Value  
Read/Write  
Initial Value  
R
0
R
0
R
0
R
0
R
0
R
0
• Bits 5:0 - ENMOB5:0: Enable MOb  
This bit provides the availability of the MOb.  
It is set to one when the MOb is enabled (i.e. CONMOB1:0 of CANCDMOB register).  
Once TXOK or RXOK is set to one (TXOK for automatic reply), the corresponding ENMOB is reset. ENMOB is also set to  
zero configuring the MOb in disabled mode, applying abortion or standby mode.  
0 - message object disabled: MOb available for a new transmission or reception.  
1 - message object enabled: MOb in use.  
• Bit 15:6 – Reserved Bits  
These bits are reserved for future use.  
16.10.6 CAN Enable Interrupt MOb Registers - CANIE2 and CANIE1  
Bit  
7
-
6
-
5
4
3
2
1
0
IEMOB5 IEMOB4 IEMOB3 IEMOB2 IEMOB1 IEMOB0  
CANIE2  
CANIE1  
-
-
-
13  
R/W  
0
-
12  
R/W  
0
-
11  
-
10  
R/W  
0
-
9
-
8
Bit  
15  
R/W  
0
14  
R/W  
0
Read/Write  
Initial Value  
Read/Write  
Initial Value  
R/W  
0
R/W  
0
R/W  
0
R
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
R/W  
0
0
• Bits 5:0 - IEMOB5:0: Interrupt Enable by MOb  
0 - interrupt disabled.  
1 - MOb interrupt enabled  
Note:  
Example: CANIE2 = 0000 1100b: enable of interrupts on MOb 2 and 3.  
• Bit 15:6 – Reserved Bits  
These bits are reserved for future use. For compatibility with future devices, it must be written to zero when CANIE1 and  
CANIE2 are written.  
162  
ATmega16/32/64/M1/C1 [DATASHEET]  
7647O–AVR–01/15  
 
 
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