93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
2.6
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX66A/B/C powers up in the ERASE/WRITE
Disable (EWDS) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (EWEN) instruc-
tion. Once the EWENinstruction is executed, program-
ming remains enabled until an EWDS instruction is
executed or Vcc is removed from the device.
To protect against accidental data disturbance, the
EWDS instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a READinstruction is indepen-
dent of both the EWENand EWDSinstructions.
FIGURE 2-5:
EWDS TIMING
TCSL
CS
CLK
DI
•••
X
1
0
0
0
0
X
FIGURE 2-6:
EWEN TIMING
TCSL
CS
CLK
DI
•••
1
0
0
1
1
X
X
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the
specified time delay (TPD). Sequential read is possible
when CS is held high. The memory data will automati-
cally cycle to the next register and output sequentially.
2.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
FIGURE 2-7:
READ TIMING
CS
CLK
DI
An
•••
A0
0
1
1
0
HIGH-Z
DO
Dx
D0
Dx
D0
Dx
D0
•••
•••
•••
DS21795B-page 8
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
