93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
FIGURE 1-1:
SYNCHRONOUS DATA TIMING
VIH
VIL
VIH
CS
TCSS
TCKH
TCKL
TCSH
CLK
DI
VIL
TDIS
TDIH
VIH
VIL
TCZ
TCZ
TPD
TPD
VOH
DO
(READ)
VOL
VOH
TSV
DO
(PROGRAM)
STATUS VALID
VOL
Note: TSV is relative to CS.
TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX66B OR 93XX66C WITH ORG = 1)
Instruction
SB Opcode
Address
Data In
Data Out Req. CLK Cycles
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
A7 A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
HIGH-Z
11
11
11
11
27
27
27
1
0
1
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
HIGH-Z
A7 A6 A5 A4 A3 A2 A1 A0
D15 – D0
A7 A6 A5 A4 A3 A2 A1 A0 D15 – D0 (RDY/BSY)
D15 – D0 (RDY/BSY)
0
1
X
X
X
X
X
X
TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX66A OR 93XX66C WITH ORG = 0)
Req. CLK
Instruction
SB Opcode
Address
Data In
Data Out
Cycles
ERASE
ERAL
EWDS
EWEN
READ
WRITE
WRAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
A8 A7 A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
HIGH-Z
12
12
12
12
20
20
20
1
0
1
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
HIGH-Z
A8 A7 A6 A5 A4 A3 A2 A1 A0
D7 – D0
A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0 (RDY/BSY)
D7 – D0 (RDY/BSY)
0
1
X
X
X
X
X
X
X
DS21795B-page 4
2003 Microchip Technology Inc.