93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.6
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX46A/B/C powers up in the ERASE/WRITE
Disable (EWDS) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (EWEN)
instruction. Once the EWEN instruction is executed,
programming remains enabled until an EWDSinstruction is
executed or Vcc is removed from the device.
To protect against accidental data disturbance, the EWDS
instruction can be used to disable all ERASE/WRITE
functions and should follow all programming operations.
Execution of a READinstruction is independent of both the
EWENand EWDSinstructions.
FIGURE 2-5:
EWDS TIMING
TCSL
CS
CLK
DI
•••
X
1
0
0
0
0
X
FIGURE 2-6:
EWEN TIMING
TCSL
CS
CLK
DI
•••
1
0
0
1
1
X
X
the rising edge of the CLK and are stable after the
specified time delay (TPD). Sequential read is possible
when CS is held high. The memory data will
automatically cycle to the next register and output
sequentially.
2.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
devices) output string. The output data bits will toggle on
FIGURE 2-7:
READ TIMING
CS
CLK
DI
•••
A0
0
An
1
1
0
HIGH-Z
DO
Dx
D0
Dx
D0
Dx
D0
•••
•••
•••
DS21749D-page 8
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
