ML6697
AC ELECTRICAL CHARACTERISTICS
Over full range of operating conditions unless otherwise specified (Note 1).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
TRANSMITTER
(Note 3)
t
TR/F
t
TM
t
TDC
t
TJT
X
OST
t
CLK
t
TXP
RECEIVER
t
RXDC
t
RXDR
Receive Bit Delay (CRS)
Receive Bit Delay (RXDV)
Note 9
Note 10
15.5
25.5
bit times
bit times
TPOUTP-TPOUTN Differential
Rise/Fall Time
TPOUTP-TPOUTN Differential
Rise/Fall Time Mismatch
TPOUTP-TPOUTN Differential
Output Duty Cycle Distortion
TPOUTP-TPOUTN Differential
Output Peak-to-Peak Jitter
TPOUTP-TPOUTN Differential
Output Voltage Overshoot
TXCLKIN – TXCLK Delay
Transmit Bit Delay
Note 8
Notes 5, 6; for any legal
code sequence
Notes 5, 6; for any legal
code sequence
Notes 4, 6
Note 6
Notes 6, 7
6
8
3.0
–0.5
–0.5
300
5.0
0.5
0.5
1400
5
11
10.5
ns
ns
ns
ps
%
ns
bit times
MII
(Media-Independent Interface)
X
BTOL
t
TPWH
t
TPWL
t
RPWH
t
RPWL
t
TPS
TX Output Clock Frequency
Tolerance
TXCLKIN pulse width HIGH
TXCLKIN pulse width LOW
RXCLK pulse width HIGH
RXCLK pulse width LOW
Setup time, TXD<3:0> Data
Valid to TXCLK Rising Edge
(1.4V point)
Hold Time, TXD<3:0> Data
Valid After TXCLK Rising Edge
(1.4V point)
Time that RXD<3:0> Data are
Valid Before RXCLK Rising Edge
(1.4V point)
Time that RXD<3:0> Data are
Valid After RXCLK Rising Edge
(1.4V point)
RXCLK 10% – 90% Rise Time
RXCLK 90%-10% Fall Time
RXEN high to RXD<3:0>,
RXDV, RXER, RXCLK Driving
RXEN low to RXD<3:0>,
RXDV, RXER, RXCLK
High Impedence
2
2
25MHz frequency
–100
14
14
14
14
15
18
22
+100
ppm
ns
ns
ns
ns
ns
t
TPH
0
ns
t
RCS
10
20
ns
t
RCH
10
19
ns
t
RPCR
t
RPCF
t
REND
t
RENZ
6
6
10
10
ns
ns
ns
ns
8