Micrel, Inc.
KSZ9021RL/RN
Power Management
The KSZ9021RL/RN offers the following power management modes:
Power Saving Mode
This mode is a KSZ9021RL/RN green feature to reduce power consumption when the cable is unplugged. It is in effect
when auto-negotiation mode is enabled and the cable is disconnected (no link).
Software Power Down Mode
This mode is used to power down the KSZ9021RL/RN device when it is not in use after power-up. Power down mode is
enabled by writing a one to register 0h bit 11. In the power down state, the KSZ9021RL/RN disables all internal functions,
except for the MII management interface. The KSZ9021RL/RN exits power down mode after writing a zero to register 0h
bit 11.
Chip Power Down Mode
This mode provides the lowest power state for the KSZ9021RL/RN when it is not in use and is mounted on the board.
Chip power down mode is enabled at power-up / reset with the MODE[3:0] strap-in pins set to 0111. The KSZ9021RL/RN
exits chip power down mode when a hardware reset is applied to the RESET_N pin with the MODE[3:0] strap-in pins set
to an operating mode other than chip power down mode.
Register Map
The IEEE 802.3 Specification provides a 32 register address space for the PHY. Registers 0 thru 15 are standard PHY
registers, defined per the specification. Registers 16 thru 31 are vendor specific registers.
The KSZ9021RL/RN uses the IEEE provided register space for IEEE Defined Registers and Vendor Specific Registers,
and uses the following registers to access Extended Registers:
•
•
•
Register 11 (Bh) for Extended Register – Control
Register 12 (Ch) for Extended Register – Data Write
Register 13 (Dh) for Extended Register – Data Read
Examples:
•
Extended Register Read
// Read from Operation Mode Strap Status Register
// Set register 259 (103h) for read
// Read register value
1. Write register 11 (Bh) with 0103h
2. Read register 13 (Dh)
•
Extended Register Write
// Write to Operation Mode Strap Override Register
// Set register 258 (102h) for write
1. Write register 11 (Bh) with 8102h
2. Write register 12 (Ch) with 0010h
// Write 0010h value to register to set NAND Tree mode
Register Number (Hex)
Description
IEEE Defined Registers
0 (0h)
1 (1h)
2 (2h)
3 (3h)
4 (4h)
5 (5h)
6 (6h)
7 (7h)
Basic Control
Basic Status
PHY Identifier 1
PHY Identifier 2
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M9999-101309-1.1
October 2009
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