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W78M32VP-100BM 参数 Datasheet PDF下载

W78M32VP-100BM图片预览
型号: W78M32VP-100BM
PDF下载: 下载PDF文件 查看货源
内容描述: [Flash,]
分类和应用: 内存集成电路
文件页数/大小: 47 页 / 1902 K
品牌: MERCURY [ MERCURY UNITED ELECTRONICS INC ]
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W78M32VP-XBX  
 The Autoselect command may not be written while the  
READ  
device is actively programming or erasing.  
All memories require access time to output array data. In a read  
operation, data is read from one memory location at a time.  
Addresses are presented to the device in random order, and the  
propagation delay through the device causes the data on its outputs  
to arrive with the address on its inputs.  
 The system must write the reset command to return to the  
read mode (or erase-suspend-read mode if the sector was  
previously in Erase Suspend).  
 It is recommended that A9 apply VID after power-up  
sequence is completed. In addition, it is recommended that  
A9 apply from VID to VIH/VIL before power-down the VCC/VIO.  
The device defaults to reading array data after device power-up or  
hardware reset. To read data from the memory array, the system  
must rst assert a valid address onA22-A0, while driving OE# and  
CE# to VIL. WE# must remain at VIH. All addresses are latched  
on the falling edge of CE#. Data will appear on DQ15-DQ0 after  
address access time (tACC), which is equal to the delay from stable  
addresses to valid output data.  
 See Table 39 for command sequence details.  
 When verifying sector protection, the sector address  
must appear on the appropriate highest order address  
bits (see Table 5 to Table 6). The remaining address bits  
are don't care. When all necessary bits have been set  
as required, the programming equipment may then read  
the corresponding identier code on DQ15-DQ0. The  
Autoselect codes can also be accessed in-system through  
the command register.  
The OE# signal must be driven to VIL. Data is output on DQ15-DQ0  
pins after the access time (tOE) has  
elapsed from the falling edge of OE#, assuming the tACC access  
time has been meet.  
PROGRAM/ERASE OPERATIONS  
PAGE READ MODE  
These devices are capable of several modes of programming and  
or erase operations which are described in detail in the following  
sections.  
The device is capable of fast page mode read and is compatible  
with the page mode Mask ROM read operation. This mode provides  
faster read access speed for random locations within a page. The  
page size of the device is 8 words. The appropriate page is selected  
by the higher address bits A(22)-A3.  
During a write operation, the system must drive CE# and WE# to  
VIL and OE# to VIH when providing address, command, and data.  
Addresses are latched on the last falling edge of WE# or CE#, while  
data is latched on the 1st rising edge of WE# or CE#.  
Address bits A2-A0 in word mode determine the specic word  
within a page. The microprocessor supplies the specic word  
location. The random or initial page access is equal to tACC or tCE  
and subsequent page read accesses (as long as the locations  
specied by the microprocessor falls within that page) is equivalent  
to tPACC. When CE# is deasserted and reasserted for a subsequent  
access, the access time is tACC or tCE. Fast page mode accesses  
are obtained by keeping the “read-page addresses” constant and  
changing the “intra-read page” addresses.  
The Unlock Bypass feature allows the host system to send program  
commands to the Flash device without rst writing unlock cycles  
within the command sequence. See Unlock Bypass section for  
details on the Unlock Bypass function.  
Note the following:  
 When the Embedded Program algorithm is complete, the  
device returns to the read mode.  
AUTOSELECT  
 The system can determine the status of the program  
operation by reading the DQ status bits. Refer to the Write  
Operation Status for information on these status bits.  
The Autoselect mode provides manufacturer ID, Device  
identication, and sector protection information, through identier  
codes output from the internal register (separate from the  
memory array) on DQ7-DQ0. This mode is primarily intended for  
programming equipment to automatically match a device to be  
programmed with its corresponding programming algorithm (see  
Table 4). The Autoselect codes can also be accessed in-system.  
 An “0” cannot be programmed back to a “1.” A succeeding  
read shows that the data is still “0.”  
 Only erase operations can convert a “0” to a “1.”  
 Any commands written to the device during the Embedded  
Program/Erase are ignored except the Suspend  
commands.  
There are two methods to access autoselect codes. One uses  
the autoselect command, the other applies VID on address pin A9.  
 Secured Silicon Sector, Autoselect, and CFI functions are  
When using programming equipment, the autoselect mode requires  
VID (11.5 V to 12.5 V) on address pin A9. Address pins must be  
as shown in Table 3.  
unavailable when a program operation is in progress.  
 A hardware reset and/or power removal immediately  
terminates the Program/Erase operation and the  
 To access Autoselect mode without using high voltage on  
 Program/Erase command sequence should be reinitiated  
once the device has returned to the read mode to ensure  
data integrity.  
A9, the host system must issue the Autoselect command.  
 The Autoselect command sequence may be written to an  
address within a sector that is either in the read or erase-  
suspend-read mode.  
 Programming is allowed in any sequence and across sector  
boundaries for single word programming operation. See  
Write Buffer Programming when using the write buffer.  
Microsemi Corporation reserves the right to change products or specications without notice.  
August 2011 © 2011 Microsemi Corporation. All rights reserved.  
Rev. 15  
3
Microsemi Corporation • (602) 437-1520 • www.microsemi.com