MDT10F630
5. Order Information
ROM
RAM EEPROM
Timer
(8/16 bit)
Device
I/O Comparators
Package
Remark
(Words) (Bytes) (Bytes)
Pin 4 is PA3
function
MDT10F630P11
MDT10F630P13
MDT10F630S11
MDT10F630S13
1.0K
1.0K
1.0K
1.0K
64
64
64
64
128
128
128
128
12
11
12
11
1
1
1
1
1/1
1/1
1/1
1/1
14-DIP
14-DIP
14-SOP
14-SOP
Pin 4 is /MCLR
external reset
function
Pin 4 is PA3
function
Pin 4 is /MCLR
external reset
function
6. Block Diagram
EEPROM
128×8
Stack Eight
Levels
Flash ROM
1024 ×14
Comparator
RAM
64 ×8
8 bits
10 bits
14 bits
PA3
PA0~PA2
PA4~PA5
5 bits
Instruction
Register
Program
Counters
Port A
Special
Register
PC0~PC5
6 bits
Port C
Instruction
Decoder
Control
Circuit
Oscillator
circuit
TMR0
8 Bits
Data
8bit
D0~D7
TMR1
16 Bits
Power on Reset
Power Down Reset
Watchdog Timer
Working Register
ALU
Status Register
This specification is subject to be changed without notice. Please visit our web site for the most updated information.
http://www.mdtic.com.tw P.2 2008/4 Ver. 1.0