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MX29LV640MLTC-90 参数 Datasheet PDF下载

MX29LV640MLTC-90图片预览
型号: MX29LV640MLTC-90
PDF下载: 下载PDF文件 查看货源
内容描述: 64M - BIT单电压3V ONLY制服行业的FLASH MEMORY [64M-BIT SINGLE VOLTAGE 3V ONLY UNIFORM SECTOR FLASH MEMORY]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 70 页 / 540 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX29LV64xM H/L  
array data (also applies during Erase Suspend).  
READING ARRAY DATA  
The device is automatically set to reading array data  
after device power-up. No commands are required to re-  
trieve data. The device is also ready to read array data  
after completing an Automatic Program or Automatic  
Erase algorithm.  
SILICON ID READ COMMAND SEQUENCE  
The SILICON ID READ command sequence allows the  
host system to access the manufacturer and devices  
codes, and determine whether or not a sector is pro-  
tected.Table 2 shows the address and data requirements.  
This method is an alternative to that shown in Table 1,  
which is intended for PROM programmers and requires  
VID on address bit A9.  
After the device accepts an Erase Suspend command,  
the device enters the Erase Suspend mode. The sys-  
tem can read array data using the standard read tim-  
ings, except that if it reads at an address within erase-  
suspended sectors, the device outputs status data. Af-  
ter completing a programming operation in the Erase  
Suspend mode, the system may once again read array  
data with the same exception. See Erase Suspend/Erase  
Resume Commands for more information on this mode.  
The system must issue the reset command to re-en-  
able the device for reading array data if Q5 goes high, or  
while in the automatic select mode. See the "Reset Com-  
mand" section, next.  
The SILICON ID READ command sequence is initiated  
by writing two unlock cycles, followed by the SILICON  
ID READ command. The device then enters the SILI-  
CON ID READ mode, and the system may read at any  
address any number of times, without initiating another  
command sequence. A read cycle at address XX00h  
retrieves the manufacturer code. A read cycle at address  
XX01h returns the device code. A read cycle containing  
a sector address (SA) and the address 02h returns 01h if  
that sector is protected, or 00h if it is unprotected. Refer  
to Table for valid sector addresses.  
RESET COMMAND  
Writing the reset command to the device resets the de-  
vice to reading array data. Address bits are don't care for  
this command.  
The system must write the reset command to exit the  
automatic select mode and return to reading array data.  
The reset command may be written between the se-  
quence cycles in an erase command sequence before  
erasing begins. This resets the device to reading array  
data.Once erasure begins, however, the device ignores  
reset commands until the operation is complete.  
BYTE/WORD PROGRAM COMMAND SE-  
QUENCE  
The command sequence requires four bus cycles, and  
is initiated by writing two unlock write cycles, followed  
by the program set-up command.The program address  
and data are written next, which in turn initiate the Em-  
bedded Program algorithm. The system is not required  
to provide further controls or timings. The device auto-  
matically generates the program pulses and verifies the  
programmed cell margin.Table 3 shows the address and  
data requirements for the byte program command se-  
quence.  
The reset command may be written between the se-  
quence cycles in a program command sequence before  
programming begins. This resets the device to reading  
array data (also applies to programming in Erase Sus-  
pend mode). Once programming begins, however, the  
device ignores reset commands until the operation is  
complete.  
The reset command may be written between the se-  
quence cycles in an SILICON ID READ command se-  
quence. Once in the SILICON ID READ mode, the reset  
command must be written to return to reading array data  
(also applies to SILICON ID READ during Erase Sus-  
pend).  
When the Embedded Program algorithm is complete, the  
device then returns to reading array data and addresses  
are no longer latched. The system can determine the  
status of the program operation by using Q7, Q6, or RY/  
BY#. See "Write Operation Status" for information on  
these status bits.  
If Q5 goes high during a program or erase operation,  
writing the reset command returns the device to reading  
Any commands written to the device during the Embed-  
ded Program Algorithm are ignored. Note that a hard-  
P/N:PM1093  
REV. 1.1, AUG. 11, 2005  
20  
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