MX29LV64xM H/L
Write the three-cycle Enter Secured Silicon Sector Region
command sequence, and then alternate method of sector
protection described in the :Sector Group Protection and
Unprotect" section.
POWER SUPPLY DE COUPLING
In order to reduce power switching effect, each device
should have a 0.1uF ceramic capacitor connected be-
tween itsVCC and GND.
Once the Secured Silicon Sector is programmed, locked
and verified, the system must write the Exit Secured
Silicon Sector Region command sequence to return to
reading and writing the remainder of the array.
LOW VCC WRITE INHIBIT
When VCC is less than VLKO the device does not ac-
cept any write cycles. This protects data during VCC
power-up and power-down.The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until VCC
is greater thanVLKO. The system must provide the proper
signals to the control pins to prevent unintentional write
whenVCC is greater thanVLKO.
WRITE PULSE "GLITCH" PROTECTION
Noise pulses of less than 5ns (typical) on CE# or WE#
will not initiate a write cycle.
LOGICAL INHIBIT
Writing is inhibited by holding any one of OE# = VIL,
CE# = VIH or WE# = VIH. To initiate a write cycle CE#
and WE# must be a logical zero while OE# is a logical
one.
POWER-UP SEQUENCE
The MX29LV64xM H/L powers up in the Read only mode.
In addition, the memory contents may only be altered
after successful completion of the predefined command
sequences.
POWER-UP WRITE INHIBIT
If WE#=CE#=VIL and OE#=VIH during power up, the
device does not accept commands on the rising edge of
WE#. The internal state machine is automatically reset
to the read mode on power-up.
P/N:PM1093
REV. 1.1, AUG. 11, 2005
17
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