MX25L3205A
DATA PROTECTION
othercommandtochangedata.TheWELbitwillreturn
to reset stage under following situation:
-Power-up
- Write Disable (WRDI) command completion
-WriteStatusRegister(WRSR)commandcompletion
- Page Program (PP) command completion
- Sector Erase (SE) command completion
- Block Erase (BE) command completion
- Chip Erase (CE) command completion
TheMX25L3205Aaredesignedtoofferprotectionagainst
accidental erasure or programming caused by spurious
system level signals that may exist during power
transition.Duringpowerupthedeviceautomaticallyresets
the state machine in the Read mode. In addition, with its
control register architecture, alteration of the memory
contents only occurs after successful completion of
specific command sequences. The device also
incorporatesseveralfeaturestopreventinadvertentwrite
cycles resulting from VCC power-up and power-down
transition or system noise.
•
•
Software Protection Mode (SPM): by using BP0-BP2
bitstosetthepartofFlashprotectedfromdatachange.
•
Power-on reset and tPUW: to avoid sudden power
switch by system power supply transition, the power-
on reset and tPUW (internal timer) may protect the
Flash.
HardwareProtectionMode(HPM):byusingWP#going
low to protect the BP0-BP2 bits and SRWD bit from
datachange.
• Valid command length checking: The command length
will be checked whether it is at byte base and com-
pleted on byte boundary.
•
DeepPowerDownMode:Byenteringdeeppowerdown
mode, the flash device also is under protected from
writingallcommandsexceptReleasefromdeeppower
down mode command (RDP) and Read Electronic
Signaturecommand(RES).
• Write Enable (WREN) command: WREN command is
requiredtosettheWriteEnableLatchbit(WEL)before
P/N:PM1243
REV. 1.2, NOV. 06, 2006
4
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