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MX25L3205AMC-20G 参数 Datasheet PDF下载

MX25L3205AMC-20G图片预览
型号: MX25L3205AMC-20G
PDF下载: 下载PDF文件 查看货源
内容描述: 32M - BIT [ ×1 ] CMOS串行eLiteFlashTM记忆 [32M-BIT [x 1] CMOS SERIAL eLiteFlashTM MEMORY]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 46 页 / 954 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX25L3205A  
GENERAL DESCRIPTION  
The MX25L3205A is a CMOS 33,554,432 bit serial  
eLiteFlashTM Memory, which is configured as 4,194,304 x  
8internally. TheMX25L3205Afeaturesaserialperipheral  
interface and software protocol allowing operation on a  
simple3-wirebus. Thethreebussignalsareaclockinput  
(SCLK), a serial data input (SI), and a serial data output  
(SO). SPI access to the device is enabled by CS# input.  
To provide user with ease of interface, a status register is  
includedtoindicatethestatusofthechip. Thestatusread  
command can be issued to detect completion and error  
flag status of a program or erase operation.  
To increase user's factory throughputs, a parallel mode is  
provided.Theperformanceofread/programisdramatically  
improved than serial mode on programmer machine.  
The MX25L3205A provide sequential read operation on  
whole chip. User may start to read from any byte of the  
array.Whiletheendofthearrayisreached,thedevicewill  
wraparoundtothebeginningofthearrayandcontinuously  
outputs data until CS# goes high.  
When the device is not in operation and CS# is high, it is  
putinstandbymodeanddrawslessthan50uADCcurrent.  
Theadditional4Kbsectorwith100Kerase/programendur-  
ancecyclesissuitableforparameterstorageandreplaces  
the EEPROM on system.  
After program/erase command is issued, auto program/  
erase algorithms which program/erase and verify the  
specified page locations will be executed. Program com-  
mand is executed on a page (256 bytes) basis, and erase  
commandisexecutedonbothchipandsector (64Kbytes)  
basis.  
TheMX25L3205AutilizesMXIC'sproprietarymemorycell  
which reliably stores memory contents even after 10K  
program and erase cycles.  
PIN CONFIGURATIONS  
16-PIN SOP (300 mil)  
PIN DESCRIPTION  
SYMBOL DESCRIPTION  
CS#  
SI  
Chip Select  
Serial Data Input  
SCLK  
SI  
HOLD#  
VCC  
16  
15  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
8
SO/PO7(1) Serial Data Output or Parallel Data  
output/input  
PO6  
NC  
PO5  
PO2  
SCLK  
Clock Input  
PO4  
PO1  
PO3  
PO0  
HOLD#(2) Hold, to pause the serial communication  
(HOLD# is not for parallel mode)  
GND  
WP#/ACC  
CS#  
SO/PO7  
WP#/ACC Write Protection: connect to GND;  
12Vforprogram/eraseacceleration:  
connect to 12V  
8-LANDSON(8x6mm)  
VCC  
GND  
+ 3.3V Power Supply  
Ground  
1
2
3
4
VCC  
HOLD#  
SCLK  
SI  
CS#  
SO  
8
7
6
5
PO0~PO6 Paralleldataoutput/input(PO0~PO6can  
be connected to NC in serial mode)  
WP#  
GND  
NC  
NoInternalConnection  
Note:  
1. PO0~PO7 are not provided on 8-LAND SON package.  
2. HOLD# is recommended to connect to VCC during  
parallelmode.  
P/N:PM1243  
REV. 1.2, NOV. 06, 2006  
2