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MX25L3205AMC-20G 参数 Datasheet PDF下载

MX25L3205AMC-20G图片预览
型号: MX25L3205AMC-20G
PDF下载: 下载PDF文件 查看货源
内容描述: 32M - BIT [ ×1 ] CMOS串行eLiteFlashTM记忆 [32M-BIT [x 1] CMOS SERIAL eLiteFlashTM MEMORY]
分类和应用: 闪存存储内存集成电路光电二极管时钟
文件页数/大小: 46 页 / 954 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX25L3205A  
COMMAND DESCRIPTION  
(1) Write Enable (WREN)  
The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP, SE, CE,  
andWRSR,whichareintendedtochangethedevicecontent,shouldbeseteverytimeaftertheWRENinstructionsetting  
the WEL bit.  
The sequence of issuing WREN instruction is: CS# goes low-> sending WREN instruction code-> CS# goes high. (see  
Figure12)  
(2) Write Disable (WRDI)  
The Write Disable (WRDI) instruction is for re-setting Write Enable Latch (WEL) bit.  
ThesequenceofissuingWRDIinstructionis:CS#goeslow->sendingWRDIinstructioncode->CS#goeshigh.(seeFigure  
13)  
The WEL bit is reset by following situations:  
-Power-up  
- Write Disable (WRDI) instruction completion  
- Write Status Register (WRSR) instruction completion  
- Page Program (PP) instruction completion  
- Sector Erase (SE) instruction completion  
- Chip Erase (CE) instruction completion  
(3) Read Identification (RDID)  
The RDID instruction is for reading the manufacturer ID of 1-byte and followed by Device ID of 2-byte. The MXIC  
Manufacturer ID is C2(hex), the memory type ID is 20(hex) as the first-byte device ID, and the individual device ID of  
second-byte ID is as followings: 16(hex) for MX25L3205A.  
ThesequenceofissuingRDIDinstructionis:CS#goeslow->sendingRDIDinstructioncode->24-bitsIDdataoutonSO  
-> to end RDID operation can use CS# to high at any time during data out. (see Figure. 14)  
While Program/Erase operation is in progress, it will not decode the RDID instruction, so there's no effect on the cycle of  
program/erase operation which is currently in progress. When CS# goes high, the device is at standby stage.  
P/N:PM1243  
REV. 1.2, NOV. 06, 2006  
10  
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