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MX25L12845EMI-10G 参数 Datasheet PDF下载

MX25L12845EMI-10G图片预览
型号: MX25L12845EMI-10G
PDF下载: 下载PDF文件 查看货源
内容描述: 128M - BIT [ ×1 / ×2 / ×4 ] CMOS MXSMIO (串行多I / O )Flash存储器 [128M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY]
分类和应用: 存储
文件页数/大小: 69 页 / 3278 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX25L12845E  
(1) Write Enable (WREN)  
The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP, 4PP,  
CP, SE, BE, BE32K, CE, WRSR, SBLK, SBULK, GBLK and GBULK, which are intended to change the device con-  
tent, should be set every time after the WREN instruction setting the WEL bit.  
The sequence of issuing WREN instruction is: CS# goes low→ sending WREN instruction code→ CS# goes high. (see  
Figure 11)  
(2) Write Disable (WRDI)  
The Write Disable (WRDI) instruction is for resetting Write Enable Latch (WEL) bit.  
The sequence of issuing WRDI instruction is: CS# goes low→ sending WRDI instruction code→ CS# goes high. (see  
Figure 12)  
The WEL bit is reset by following situations:  
- Power-up  
- Write Disable (WRDI) instruction completion  
- Write Status Register (WRSR) instruction completion  
- Page Program (PP, 4PP) instruction completion  
- Sector Erase (SE) instruction completion  
- Block Erase (BE, BE32K) instruction completion  
- Chip Erase (CE) instruction completion  
- Continuously Program mode (CP) instruction completion  
- Single Block Lock/Unlock (SBLK/SBULK) instruction completion  
- Gang Block Lock/Unlock (GBLK/GBULK) instruction completion  
(3) Read Identification (RDID)  
The RDID instruction is for reading the Manufacturer ID of 1-byte and followed by Device ID of 2-byte. The MXIC  
Manufacturer ID is C2(hex), the memory type ID is 20(hex) as the first-byte Device ID, and the individual Device ID  
of second-byte ID are listed as table of "ID Definitions". (see Table 8)  
The sequence of issuing RDID instruction is: CS# goes low→ sending RDID instruction code → 24-bits ID data out  
on SO → to end RDID operation can use CS# to high at any time during data out. (see Figure 13 and Figure 14 for  
parallel mode)  
While Program/Erase operation is in progress, it will not decode the RDID instruction, so there's no effect on the cy-  
cle of program/erase operation which is currently in progress. When CS# goes high, the device is at standby stage.  
P/N: PM1428  
REV. 0.06, MAR. 05, 2009  
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