MX25L12835F
9-34. SPB Lock Bit (SPBLB)
The Solid Protection Bit Lock Bit (SPBLB) is assigned to control all SPB status. It is a unique and volatile.
The default status of this register is determined by Lock Register bit 1 and bit 2 status. Refer to "SPB Lock Register"
for more SPB Lock information.
When under Solid Protect Mode, there is no software command sequence requested to unlocks this bit. To clear the
SPB lock bit, just take the device through a reset or a power-up cycle. When under Password Protected Mode, in
order to prevent modified, the SPB Lock Bit must be set after all SPBs are setting the desired status.
SPB Lock Register
Bit
7-1
Description
Reserved
Bit Status
X
Default
0000000
Type
Volatile
0= SPB bit protected
1=SPB bit unprotected
Solid protected Mode=1
Password Protected Mode=0
0
SPBLK (Lock SPB Bit)
Volatile
Figure 61. SPB Lock Bit Set (SPBLK) Sequence
CS#
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SCLK
Command
A6h
SI
High-Z
SO
Figure 62. Read SPB Lock Register (RDSPBLK) Sequence
CS#
0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15
Mode 3
Mode 0
SCLK
SI
command
A7h
Register Out
Register Out
High-Z
SO
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
MSB
MSB
P/N: PM1795
REV. 1.0, OCT. 23, 2012
67
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