Hig h -S p e e d , Dig it a lly Ad ju s t e d
S t e p -Do w n Co n t ro lle rs fo r No t e b o o k CP Us
0/MAX71
V
BATT
GND IN
ALL ANALOG GROUNDS
CONNECT TO GND ONLY
VIA TO PGND
NEAR Q2 SOURCE
MAX1710
MAX1711
VIA TO GNDS
V
CC
CIN
GND
OUT
CC
Q1
REF
D1
Q2
COUT
V
DD
I
LIM
V
OUT
GND
VIA TO SOURCE
OF Q2
CONNECT GND TO PGND
BENEATH IC, 1 POINT ONLY.
SPLIT ANALOG GND PLANE AS SHOWN.
VIA TO FBS
L1
VIA TO FB
NEAR COUT+
VIA TO LX
NOTES: "STAR" GROUND IS USED.
D1 IS DIRECTLY ACROSS Q2.
INDUCTOR DISCHARGE PATH HAS LOW DC RESISTANCE
Figure 11. Power-Stage PC Board Layout Example
•
Keep the power traces and load connections short.
This practice is essential for high efficiency. The use
of thick copper PC boards (2 oz. vs. 1 oz.) can en-
hance full-load efficiency by 1% or more. Correctly
routing PC board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
made longer than the discharge path. For example,
it’s better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-side
MOSFET or between the inductor and the output filter
capacitor.
•
Ensure that the FB connection to C
is short and
OUT
direct. However, in some cases it may be desirable to
deliberately introduce some trace length between the
FB inductor node and the output filter capacitor (see
the All-Ceramic-Capacitor Application section).
•
•
LX and PGND connections to Q2 for current limiting
must be made using Kelvin sense connections in
order to guarantee the current-limit accuracy. With
SO-8 MOSFETs, this is best done by routing power to
the MOSFETs from outside using the top copper
layer, while tying in PGND and LX inside (underneath)
the SO-8 package.
•
•
Route high-speed switching nodes away from sensi-
tive analog areas (CC, REF, ILIM).
Make all pin-strap control input connections (SKIP,
ILIM, etc.) to GND or V rather than PGND or V
.
CC
DD
When trade-offs in trace lengths must be made, it’s
preferable to allow the inductor charging path to be
______________________________________________________________________________________ 25
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
