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MAX1711EEG 参数 Datasheet PDF下载

MAX1711EEG图片预览
型号: MAX1711EEG
PDF下载: 下载PDF文件 查看货源
内容描述: 高速,数字可调,降压型控制器,用于笔记本电脑 [High-Speed, Digitally Adjusted Step-Down Controllers for Notebook CPUs]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管电脑输入元件
文件页数/大小: 28 页 / 299 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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High-Speed, Digitally Adjusted
Step-Down Controllers for Notebook CPUs
MAX1710/MAX1711
side MOSFET, which causes a faster inductor-current
discharge ramp. The on-times guaranteed in the
Electrical Characteristics
are influenced by switching
delays in the external high-side power MOSFET. The
exact switching frequency will depend on gate charge,
internal gate resistance, source inductance, and DH out-
put drive characteristics.
Two external factors that can influence switching-fre-
quency accuracy are resistive drops in the two conduc-
tion loops (including inductor and PC board resistance)
and the dead-time effect. These effects are the largest
contributors to the change of frequency with changing
load current. The dead-time effect is a notable disconti-
nuity in the switching frequency as the load current is
varied (see
Typical Operating Characteristics).
It occurs
whenever the inductor current reverses, most commonly
at light loads with
SKIP
high. With reversed inductor cur-
rent, the inductor’s EMF causes LX to go high earlier
than normal, extending the on-time by a period equal to
the low-to-high dead time. For loads above the critical
conduction point, the actual switching frequency is:
V
OUT
+
V
DROP1
f
=
t
ON
(V
IN
+
V
DROP2
)
where V
DROP1
is the sum of the parasitic voltage drops
in the inductor discharge path, including synchronous
rectifier, inductor, and PC board resistances; V
DROP2
is
the sum of the resistances in the charging path, and t
ON
is the on-time calculated by the MAX1710/MAX1711.
average value of the output ripple waveform. If the inte-
grator amplifiers are disabled, V
OUT
is regulated at the
valleys of the output ripple waveform. This creates a
slight load-regulation characteristic in which the output
voltage rises approximately 1% (up to 1/2 the peak
amplitude of the ripple waveform as a limit) when under
light loads.
Integrators have both beneficial and detrimental charac-
teristics. While they do correct for drops due to DC bus
resistance and tighten the DC output voltage tolerance
limits by averaging the peak-to-peak output
ripple, they can interfere with achieving the fastest possi-
ble load-transient response. The fastest transient
response is achieved when all three integrators are dis-
abled. This works very well when the MAX1710/
MAX1711 circuit can be placed very close to the CPU.
There is often a connector, or at least many milliohms of
PC board trace resistance, between the DC-DC convert-
er and the CPU. In these cases, the best strategy is to
place most of the bulk bypass capacitors close to the
CPU, with just one capacitor on the other side of the
connector near the MAX1710/MAX1711 to control ripple
if the CPU card is unplugged. In this situation, the
remote-sense lines and integrators provide a real benefit.
When both GNDS and FBS are tied to V
CC
so that all
three integrators are disabled, CC can be left uncon-
nected, which eliminates a component.
Automatic Pulse-Skipping Switchover
At light loads, an inherent automatic switchover to PFM
takes place. This switchover is effected by a comparator
that truncates the low-side switch on-time at the inductor
current’s zero crossing. This mechanism causes the
threshold between pulse-skipping PFM and non-skip-
ping PWM operation to coincide with the boundary
between continuous and discontinuous inductor-current
operation (also known as the “critical conduction” point;
see Continuous to Discontinuous Inductor Current Point
vs. Input Voltage graphs in the
Typical Operating
Characteristics).
For a battery range of 7V to 24V this
threshold is relatively constant, with only a minor depen-
dence on battery voltage.
I
LOAD(SKIP)
K
2L
Integrator Amplifiers (CC)
There are three integrator amplifiers that provide a fine
adjustment to the output regulation point. One amplifier
monitors the difference between GNDS and GND, while
another monitors the difference between FBS and FB.
The third amplifier integrates the difference between REF
and the DAC output. These three transconductance
amplifiers’ outputs are directly summed inside the chip,
so the integration time constant can be set easily with a
capacitor. The g
m
of each amplifier is 160µmho (typical).
The integrator block has an ability to move and correct
the output voltage by about -2%, +4%. For each amplifi-
er, the differential input voltage range is about ±50mV
total, including DC offset and AC ripple. The voltage
gain of each integrator is about 80V/V.
The FBS amplifier corrects for DC voltage drops in PC
board traces and connectors in the output bus path
between the DC-DC converter and the load. The GNDS
amplifier performs a similar DC correction task for the
output ground bus. The third amplifier provides an aver-
aging function that forces V
OUT
to be regulated at the
where K is the On-Time Scale factor (see Table 5). The
load-current level at which PFM/PWM crossover occurs,
I
LOAD(SKIP)
, is equal to 1/2 the peak-to-peak ripple cur-
rent, which is a function of the inductor value (Figure 3).
For example, in the standard application circuit with t
ON
= 300ns at 24V, V
OUT
= 2V, and L = 2µH, switchover to
pulse-skipping operation occurs at I
LOAD
= 1.65A or
13
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