MAX11329–MAX11332
3Msps, 12-/10-Bit, 8-/16-Channel ADCs with
Post-Mux External Signal Conditioning Access
Table 8. Analog Input Configuration and Unipolar/Bipolar Waveforms
SUPPORTED WAVEFORMS
REFSEL = 0 REFSEL = 1
ANALOG INPUT
CONFIGURATION
UNIPOLAR/BIPOLAR
REGISTER SETTING
REF+
RANGE: 1V TO V
REF+
RANGE: 1V TO V
Table 10. Unipolar Register:
Set desired channel(s) to 0
or PDIFF_COM to 1.
DD
DD
V
IN+
V
IN+
Unipolar
(Binary
Coding)
REF+
REF+
Single-
Ended
1V
Counterpart Register
REF-
Table 11. Bipolar Register:
Set desired channel(s) to 0.
GND, AIN15
PDIFF_COM = 1
0V
-0.3V
REF+
REF+
RANGE: 1V TO V
RANGE: 1V TO V
DD
DD
V
IN+
Table 10. Unipolar Register:
Set desired channel(s) to 1.
V
IN+
Unipolar
(Binary
Coding)
REF+
REF+
Fully
Differential
V
IN-
V
IN-
Counterpart Register
Table 11. Bipolar Register:
Set desired channel(s) to 0.
V
IN-
(DC OFFSET
OR
SINUSOID)
1V
(DC OFFSET
OR
SINUSOID)
REF-
GND
0V
-0.3V
REF+
REF+
RANGE: 1V TO V
RANGE: 1V TO V
DD
DD
V
IN+
Table 11. Bipolar Register:
Set desired channel(s) to 1.
V
IN+
Bipolar
(2’s
Complement)
REF+
2
REF+
REF+
Fully
Differential
V
IN-
V
IN-
Counterpart Register
Table 10. Unipolar Register:
Set desired channel(s) to 0.
1V
REF-
GND
0V
-0.3V
Table 9. ADC Output as a Function of Unipolar/Bipolar Register Settings
CHANNEL SELECTION
BIT NAME
UNIPOLAR REGISTER
UCH0/1 PDIFF�COM
BIPOLAR REGISTER
FUNCTION
BCH0/1
0
0
1
0
0
0
0
1
0
AIN0 (binary, unipolar)
AIN0/1 pair (two’s complement, bipolar)
AIN0/1 pair (binary, unipolar)
AIN0 Selection:
CHSEL[3:0] = 0000
CHSCAN0 = 1
AIN0/1 pair (binary, unipolar); Unipolar register
takes precedence
1
0
1
X
0
0
1
1
0
0
0
X
0
1
0
AIN0 referred to REF-/AIN15 (binary, unipolar)
AIN1 (binary, unipolar)
AIN0/1 pair (two’s complement, bipolar)
AIN0/1 pair (binary, unipolar)
AIN1 Selection:
CHSEL[3:0] = 0001
CHSCAN1 = 1
AIN0/1 pair (binary, unipolar), Unipolar register
takes precedence
1
X
0
1
1
X
AIN1 referred to REF-/AIN15 (binary, unipolar)
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