1024-Bit, 1-Wire EEPROM
Note 19: Current drawn from IO during the EEPROM programming interval. The pullup circuit on IO during the programming interval
should be such that the voltage at IO is greater than or equal to V
. If V
in the system is close to V
, a low-
PUPMIN
PUP
PUPMIN
impedance bypass of R , which can be activated during programming, may need to be added.
PUP
Note 20: Interval begins t
after the trailing rising edge on IO for the last time slot of the E/S byte for a valid Copy Scratchpad
REHMAX
sequence. Interval ends once the device’s self-timed EEPROM programming cycle is complete and the current drawn by
the device has returned from I to I .
PROG
L
Note 21: t
for units branded version “A1” is 12.5ms. t
for units branded version “A2” and later is 10ms.
PROG
PROG
Note 22: Write-cycle endurance is degraded as T increases.
A
DS2431
Note 23: Not 100% production tested; guaranteed by reliability monitor sampling.
Note 24: Data retention is degraded as T increases.
A
Note 25: Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to the
data sheet limit at operating temperature range is established by reliability testing.
Note 26: EEPROM writes can become nonfunctional after the data-retention time is exceeded. Long-term storage at elevated tem-
peratures is not recommended; the device can lose its write capability after 10 years at +125°C or 40 years at +85°C.
COMPꢁRISON ꢂꢁBLE
LEGACY VALUES
DS2431 VALUES
STANDARD SPEED
(µs)
OVERDRIVE SPEED
(µs)
STANDARD SPEED
(µs)
OVERDRIVE SPEED
(µs)
PARAMETER
MIN
61
MAX
MIN
7
MAX
MIN
65*
480
15
MAX
MIN
8*
48
2
MAX
t
t
t
t
t
(including t
)
(undefined)
(undefined)
60
(undefined)
(undefined)
640
(undefined)
SLOT
RSTL
PDH
PDL
REC
480
15
48
2
80
6
80
6
60
60
240
8
24
16
60
240
8
24
60
120
6
60
120
6
15.5
W0L
*Intentional change; longer recovery time requirement due to modified 1-Wire front-end.
Note: Numbers in bold are not in compliance with legacy 1-Wire product standards.
4
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
