DS21354/DS21554 3.3V/5V E1 Single-Chip Transceivers
ADDRESS
TYPE
REGISTER
NAME
85
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Receive Channel 6
RC6
86
Receive Channel 7
RC7
87
Receive Channel 8
RC8
88
Receive Channel 9
RC9
89
Receive Channel 10
Receive Channel 11
Receive Channel 12
Receive Channel 13
Receive Channel 14
Receive Channel 15
Receive Channel 16
Receive Channel 17
Receive Channel 18
Receive Channel 19
Receive Channel 20
Receive Channel 21
Receive Channel 22
Receive Channel 23
Receive Channel 24
Receive Channel 25
Receive Channel 26
Receive Channel 27
Receive Channel 28
Receive Channel 29
Receive Channel 30
Receive Channel 31
Receive Channel 32
Transmit Channel Control 1
Transmit Channel Control 2
Transmit Channel Control 3
Transmit Channel Control 4
Receive Channel Control 1
Receive Channel Control 2
Receive Channel Control 3
Receive Channel Control 4
Common Control 4
Transmit DS0 Monitor
Common Control 5
Receive DS0 Monitor
Test 3
RC10
RC11
RC12
RC13
RC14
RC15
RC16
RC17
RC18
RC19
RC20
RC21
RC22
RC23
RC24
RC25
RC26
RC27
RC28
RC29
RC30
RC31
RC32
TCC1
TCC2
TCC3
TCC4
RCC1
RCC2
RCC3
RCC4
CCR4
TDS0M
CCR5
RDS0M
TEST3
(set to 00h)
(set to 00h)
(set to 00h)
HCR
8A
8B
8C
8D
8E
8F
90
91
92
93
94
95
96
97
98
99
9A
9B
9C
9D
9E
9F
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AA
AB
AC
AD
AE
AF
B0
B1
B2
B3
B4
R/W
R
R/W
—
Not used
—
—
Not used
Not used
R/W
R/W
R/W
R/W
R/W
HDLC Control Register
HDLC Status Register
HDLC Interrupt Mask Register
Receive HDLC Information Register
Receive HDLC FIFO Register
HSR
HIMR
RHIR
RHFR
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