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71M6543H 参数 Datasheet PDF下载

71M6543H图片预览
型号: 71M6543H
PDF下载: 下载PDF文件 查看货源
内容描述: 可选增益1或8的一个电流电能表计量芯片的补偿 [Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation]
分类和应用:
文件页数/大小: 157 页 / 2164 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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71M6543F/H and 71M6543G/GH Data Sheet  
2.5.14 Test Ports (TMUXOUT and TMUX2OUT Pins)  
Two independent multiplexers allow the selection of internal analog and digital signals for the TMUXOUT  
and TMUX2OUT pins. These pins are multiplexed with the SEG47 and SEG46 function. In order to function  
as test pins, LCD_MAP[46] (I/O RAM 0x2406[6]) and LCD_MAP[47] (I/O RAM 0x2406[7]) must be 0.  
One of the digital or analog signals listed in Table 61 can be selected to be output on the TMUXOUT pin.  
The function of the multiplexer is controlled with the I/O RAM register TMUX[4:0] (I/O RAM 0x2502[4:0], as  
shown in Table 60.  
One of the digital or analog signals listed in Table 61 can be selected to be output on the TMUX2OUT pin.  
The function of the multiplexer is controlled with the I/O RAM register TMUX2[4:0] (I/O RAM 0x2503[4:0]), as  
shown in.  
The TMUX and TMUX2 I/O RAM locations are non-volatile and their contents are preserved by  
battery power and across resets.  
The TMUXOUT and TMUX2OUT pins may be used for diagnosis purposes or in production test. The  
RTC 1-second output may be used to calibrate the crystal oscillator. The RTC 4-second output provides  
even higher precision.  
Table 60: TMUX[4:0] Selections  
TMUX[5:0]  
Signal Name  
Description  
1
RTCLK  
32.768 kHz clock waveform  
Indicates when the MPU has reset the watchdog timer. Can be  
monitored to determine spare time in the watchdog timer.  
9
WD_RST  
CKMPU  
A
MPU clock – see Table 8  
Indicates that the V3P3A pin voltage is≥ 3.0 V. The V3P3A and  
V3P3SYS pins are expected to be tied together at the PCB level.  
The 71M6543 monitors the V3P3A pin voltage only.  
D
V3AOK bit  
Indicates that the V3P3A pin voltage is≥ 2.8 V. The V3P3A and  
V3P3SYS pins are expected to be tied together at the PCB level.  
The 71M654 monitors the V3P3A pin voltage only.  
E
V3OK bit  
Internal multiplexer frame SYNC signal. See Figure 4 and  
Figure 5.  
1B  
MUX_SYNC  
1C  
1D  
1F  
CE_BUSY interrupt  
CE_XFER interrupt  
RTM output from CE  
See 2.3.3 on page 25 and Figure 12 on page 46  
See 2.3.5 on page 26  
Note:  
All TMUX[5:0] values which are not shown are reserved.  
v1.2  
© 2008–2011 Teridian Semiconductor Corporation  
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