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71M6543H 参数 Datasheet PDF下载

71M6543H图片预览
型号: 71M6543H
PDF下载: 下载PDF文件 查看货源
内容描述: 可选增益1或8的一个电流电能表计量芯片的补偿 [Selectable Gain of 1 or 8 for One Current Energy Meter ICs Metrology Compensation]
分类和应用:
文件页数/大小: 157 页 / 2164 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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71M6543F/H and 71M6543G/GH Data Sheet  
Table 45: I/O RAM Registers for RTC Interrupts  
Description  
Location Rst Wk Dir  
Name  
RTC_TMIN[5:0]  
289E[5:0]  
0
0
R/W The target minutes register. See below.  
The target hours register. The RTC_T interrupt occurs  
RTC_THR[4:0]  
when RTC_MIN[5:0] becomes equal to RTC_TMIN[5:0]  
and RTC_HR[4:0] becomes equal to RTC_THR[4:0].  
289F[4:0]  
0
0
R/W  
2.5.5 71M6543 Temperature Sensor  
The 71M6543 includes an on-chip temperature sensor for determining the temperature of its bandgap  
reference. The primary use of the temperature data is to determine the magnitude of compensation  
required to offset the thermal drift in the system for the compensation of current, voltage and energy  
measurement and the RTC. See 4.5 Metrology Temperature Compensation on page 89. Also see 2.5.4.4  
RTC Temperature Compensation on page 53.  
Unlike earlier generation Teridian SoCs, the 71M6543 does not use the ADC to read the temperature  
sensor. Instead, it uses a technique that is operational in SLP and LCD mode, as well as BRN and MSN  
modes. This means that the temperature sensor can be used to compensate for the frequency variation  
of the crystal, even in SLP mode while the MPU is halted. See 2.5.4.4 RTC Temperature Compensation  
on page 53.  
In MSN and BRN modes, the temperature sensor is awakened on command from the MPU by setting the  
TEMP_START (I/O RAM 0x28B4[6]) control bit. In SLP and LCD modes, it is awakened at a regular rate  
set by TEMP_PER[2:0] (I/O RAM 0x28A0[2:0]).  
The result of the temperature measurement is read from the two I/O RAM locations STEMP[10:3] (I/O  
RAM 0x2881) and STEMP[2:0] (I/O RAM 0x2882[7:5]). Note that both of these I/O RAM locations must be  
read and properly combined to form the STEMP[10:0] 11-bit value (see STEMP in Table 46). The resulting  
11-bit value is in 2’s complement form and ranges from -1024 to +1023 (decimal).  
The equations below are used to calculate the sensed temperature. The first equation applies when the  
71M6543F and 71M6543G are in MSN mode and TEMP_PWR = 1. The second equation applies when the  
71M6543F and 71M6543G are in BRN mode, and in this case, the TEMP_PWR and TEMP_BSEL bits must  
both be set to the same value, so that the battery that supplies the temperature sensor is also the battery  
that is measured and reported in BSENSE. Thus, the second equation requires reading STEMP and  
BSENSE. In the second equation, BSENSE (the sensed battery voltage) is used to obtain a more accurate  
temperature reading when the IC is in BRN mode. A second set of equations if provided for the  
71M6543H and 71M6543GH high precision parts. The coefficients provided in the various STEMP  
equations below are typical.  
For the 71M6543F and 71M6543G in MSN Mode (with TEMP_PWR = 1):  
Temp(°C) = 0.325STEMP + 22  
For the 71M6543F and 71M6543G in BRN Mode, (with TEMP_PWR=TEMP_BSEL):  
Temp(oC) = 0.325STEMP + 0.00218BSENSE2 0.609BSENSE + 64.4  
For the 71M6543H and 71M6543GH in BRN mode (with TEMP_PWR=TEMP_BSEL):  
If STEMP ≤ 0:  
2
( )  
푇푒푚푝 ℃ = 0.325 ∙ 푆푇퐸푀푃 + 0.00218 ∙ 퐵푆퐸푁푆퐸 0.609 ∙ 퐵푆퐸푁푆퐸 + 64.4  
If STEMP > 0:  
63 ∙ 푆푇퐸푀푃  
+ 0.00218 ∙ 퐵푆퐸푁푆퐸2 0.609 ∙ 퐵푆퐸푁푆퐸 + 64.4  
( )  
푇푒푚푝 ℃ =  
푇퐸푀푃_85  
v1.2  
© 2008–2011 Teridian Semiconductor Corporation  
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