71M6543F/H and 71M6543G/GH Data Sheet
6.4
Performance Specifications
6.4.1 Input Logic Levels
Table 91: Input Logic Levels
Parameter
Condition
Min
Typ
Max
Unit
V
Digital high-level input voltage1, VIH
Digital low-level input voltage1, VIL
2
0.8
V
Input pullup current, IIL
E_RXTX, E_RST, E_TCLK
OPT_RX, OPT_TX
VIN=0 V,
ICE_E=3.3 V
10
10
10
-1
100
100
100
1
µA
µA
µA
µA
SPI_CSZ (SEGDIO36)
Other digital inputs
0
0
Input pull down current, IIH
ICE_E, RESET, TEST
Other digital inputs
VIN=V3P3D
10
-1
100
1
µA
µA
Note:
1. In battery powered modes, digital inputs should be below 0.1 V or above VBAT – 0.1 V to
minimize battery current.
6.4.2 Output Logic Levels
Table 92: Output Logic Levels
Parameter
Condition
Min
Typ
Max
Unit
ILOAD = 1 mA
V3P3D–0.4
V3P3D-0.6
V
V
Digital high-level output voltage
VOH
ILOAD = 15 mA
(see notes 1, 2)
ILOAD = 1 mA
ILOAD = 15 mA
(see note 1)
0
0
0.4
0.8
V
V
Digital low-level output voltage
VOL
Note:
1. Guaranteed by design; not production tested.
2. Caution: The sum of all pull up currents must be compatible with the on-resistance of the
internal V3P3D switch. See 6.4.6 V3P3D Switch on page 139.
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