MCP795WXX/MCP795BXX
9.1.9
WRITE STATUS REGISTER
(SRWRITE)
The Write Status Register (SRWRITE) instruction
allows the user to select one of four levels of protec-
tion for the array by writing to the appropriate bits in
the status register. The array is divided up into four
segments. The user has the ability to write protect
none, one, two, or all four of the segments of the array.
The partitioning is controlled as shown in Table 9-2.
See Figure 9-6 for the SRWRITE timing sequence.
TABLE 9-2:
BP1
ARRAY PROTECTION
Array Addresses
BP0
Write-Protected
(2 kbit shown)
0
0
0
1
none
upper 1/4
(C0h-FFh)
1
1
0
1
upper 1/2
(80h-FFh)
all
(00h-FFh)
FIGURE 9-6:
WRITE STATUS REGISTER TIMING SEQUENCE
CS
TWC
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
15
0
SCK
SI
Instruction
Data to STATUS Register
7
6
5
4
3
2
0
0
0
0
0
0
0
1
High-Impedance
SO
2011 Microchip Technology Inc.
Preliminary
DS22280A-page 35
MAS [ MICRO ANALOG SYSTEMS ]
