DA9560.001
20 January, 2005
0x09
R/W
0
Right AUX Gain Register
-
0x09[7:5]
0x09[4:0]
-
-
Unused
ARV[4:0] Right AUX pre-amplifier gain
ARV
R/W
00000
00000
00001
...
Mute
-20 dB
in steps of 2 dB
10101...11111 20 dB
AIN Gain Register
0x0A
R/W
-
0
-
0x0A[7:5]
-
Unused
AIV
0x0A[4:0] R/W
00000
AIV[4:0] AIN pre-amplifier gain
00000
00001
...
Mute
-20 dB
in steps of 2 dB
10101...11111 20 dB
Note: Unused register bit values are undefined.
I2C BUS TIMING
LSVDD = VBAT = 3.6V, EPVDD = HPVDD = VLDO = 2.86V (LDO-mode), -40°C ≤ TA ≤ +85°C, typical
values at TA = +27°C, unless otherwise noted
Parameter
Pin Name Conditions
Min
Nom
Max
Unit
Input Low Voltage
SCLK,
SDI
tbd
IOVDD
Input High Voltage
SCLK,
tbd
tbd
tbd
tbd
tbd
IOVDD
ns
SDI
Start Condition Setup
Time
SCLK,
SDI
Stop Condition Setup
SCLK,
ns
Time
SDI
Data Setup Time before
clock rising edge
SCLK,
SDI
ns
Data Hold Time after
SCLK,
ns
clock falling edge
SDI
Clock Low Pulse Time
Clock High Pulse Time
Bus Frequency
SCLK
SCLK
SCLK
tbd
tbd
ns
ns
MHz
V
tbd
tbd
Data Output Low Voltage
SCLK,
ILOAD = 3
mA
SDI
Data Output High
Leakage Current
SCLK,
SDI
VSDI = 5 V
tbd
µA
ns
ns
Data Output Hold Time
SCLK,
tbd
tbd
after clock falling edge
SDI
Data Output Setup Time
before clock rising edge
SCLK,
SDI
fI2C = 1MHz
22 (25)
MAS [ MICRO ANALOG SYSTEMS ]
