DA9560.001
20 January, 2005
1st byte
2nd byte
3rd byte
4th byte
device id
1001 101
r/w
1/0
Register address
0000 a3 a2 a1 a0
code
xxxx xxxx
code
xxxx xxxx
Called as DW when Write
Called as DR when Read
Table 1. I2C Data Format
◆ SPI Description
Serial Peripheral Interface (SPI) bus is a 4-wire
serial communication interface between a master
and a slave device. SPI bus is selected by setting
MODE pin to low. SCLK pin is clock, XCS pin chip
select, SDI data pin and SDO data out pin. Data
writing is started with pulling device specific XCS
pin low, and first bit (MSB) is written at next SCLK
rising edge.
mode stops at address 0x0F to prevent address
overflow and device reset.
The following byte written to SDI is either register
input data (write mode) or it is ignored (read mode).
In the read mode the selected register’s data can
be read from SDO pin at SCLK falling edge. Data
transfer stops with rising XCS pin.
In case XCS pin is held low after two first bytes, the
increment mode is enabled and the following
written/read bytes can be transferred to/from the
next registers. SDO output is at the high impedance
state when MAS9560 is not in read mode.
The first byte defines register address and whether
data will be read or write, see table 2 below. Bit 5:
Read = 1 and Write = 0. Note that incremental
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Function
x
x
R/W
x
A3
A2
A1
A0
Table 2. SPI first byte
◆ I2S Description
Inter-IC Sound (I2S) bus is a 3-wire serial interface
for transmission of 2-channel (stereo) Pulse Code
Modulation digital data for DACs. Data is sent in 2’s
complement format MSB first. The receiver ignores
extra bits from the transmitter, if more than 16 bits
are transmitted. In case byte length is less than 16
bits, data is still 2’s complement and unspecified
bits are set to zero.
data for Channel 1 (left channel) is read, and WSI =
‘1’ when Channel 2 (right channel) is read. This can
be changed with POL byte (see register description
for I2S Interface Control Register – p. 17).
Left justified format varies also depending on the
delay before the first data byte. Default delay is one
clock pulse, but this delay can be configured with
DEL bit.
Word Select pin (WSI-pin) can be configured in
MAS9560 supports only Left-Justified Format.
MAS9560. The default setting is: WSI = ‘0’ when
17 (25)
MAS [ MICRO ANALOG SYSTEMS ]
