Pin Information
Pin Descriptions
Table 9: Gigabit Ethernet Port Interface Pin Assignments (Continued)
Pin Name
I/O
Pin
Type
Power
Rail
Description
GE0_RXERR
I
CMOS
VDDO_D
MII Receive Error
Indicates that an error symbol, a false carrier, or a carrier
extension symbol is detected on the cable. It is synchronous to
GE0_RXCLK input.
NOTE: Multiplexed on MPP.
GMII Receive Error
It is synchronous to GE0_RXCLK input.
NOTE: Multiplexed on MPP.
GE0_RXCTL/
GE0_RXDV
I
CMOS
VDD_GE
RGMII Receive Control
GE0_RXCTL is presented on the rising edge of GE0_RXCLK. A
logical derivative of GE0_RXDV and GE0_RXERR is presented on
the falling edge of RXCLK.
MII Receive Data Valid
Indicates that valid data is present on the GE0_RXD lines. It is
synchronous to GE0_RXCLK.
GMII Receive Data Valid
It is synchronous to GE0_RXCLK input.
GE0_RXCLK
I
CMOS
VDD_GE
RGMII Receive Clock
The receive clock provides a 125 MHz, 25 MHz, or 2.5 MHz
reference clock derived from the received data stream.
MII Receive Clock
Provides the timing reference for the reception of the GE0_RXDV,
GE0_RXERR, and GE0_RXD[3:0] signals. This clock operates at
2.5 MHz or 25 MHz.
GMII Receive Clock
Provides the timing reference for the reception of the GE0_RXDV,
GE0_RXERR, and GE0_RXD[7:0] signals. This clock operates at
125 MHz.
GE0_COL
I
CMOS
VDDO_D
MII Collision Detect
Indicates a collision has been detected on the wire. This input is
ignored in full-duplex mode. GE0_COL is not synchronous to any
clock.
NOTE: If not using the MII interface, this pin must be left
unconnected.
Multiplexed on MPP.
GE_MDC
GE_MDIO
t/s
O
CMOS
CMOS
VDD_GE
VDD_GE
Management Data Clock
MDC is derived from TCLK divided by 128.
Provides the timing reference for the transfer of the MDIO signal.
t/s
I/O
Management Data In/Out Used to transfer control information and
status between PHY devices and the GbE controller.
NOTE: A 2 kilohm pullup resistor is required.
Copyright © 2008 Marvell
MV-S104552-U0 Rev. D
December 6, 2008, Preliminary
Document Classification: Proprietary Information
Page 31
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
