Pin Information
Pin Descriptions
2.2.11
UART Interface Pin Assignment
Table 14: UART 0/1/2/3 Interfaces Pin Assignments
Pin Name
I/O
Pin
Type
Power
Rails
Description
UA0_RXD
UA1_RXD
I
CMOS
CMOS
CMOS
CMOS
CMOS
VDDO_C
VDDO_C
VDDO_C
VDDO_C
UART0/1 RX Data
UART0/1 TX Data
UA0_TXD
UA1_TXD
O
I
UA0_CTSn
UA1_CTSn
UART0/1 Clear To Send
NOTE: Multiplexed on MPP.
UA0_RTSn
UA1_RTSn
O
I
UART0/1 Request To Send
NOTE: Multiplexed on MPP.
UA2_RXD
UA3_RXD
VDDO_C
or
UART2/3 RX Data
NOTE: Multiplexed on MPP.
VDDO_B
UA2_TXD
UA3_TXD
O
I
CMOS
CMOS
CMOS
VDDO_C
or
VDDO_B
UART2/3 TX Data
NOTE: Multiplexed on MPP.
UA2_CTSn
UA3_CTSn
VDDO_C
or
VDDO_B
UART2/3 Clear To Send
NOTE: Multiplexed on MPP.
UA2_RTSn
UA3_RTSn
O
VDDO_C
or
UART2/3 Request To Send
NOTE: Multiplexed on MPP.
VDDO_B
For the UART pins that are multiplexed, see Section 6, Pin Multiplexing, on page 44 for
details.
Note
Copyright © 2008 Marvell
MV-S104552-U0 Rev. D
December 6, 2008, Preliminary
Document Classification: Proprietary Information
Page 35